| Message ID | 1440540222-21401-1-git-send-email-paulo.r.zanoni@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Tue, Aug 25, 2015 at 07:03:41PM -0300, Paulo Zanoni wrote: > Dear git bisect user, > > Even though this is the patch that introduced the WARN() you're > bisecting, please notice that it's very likely that the problem you're > facing was already present before this commit. In other words: this > commit adds code to detect errors and give WARN()s about them, but the > errors were already there. > > In order to continue your debug, please use the i915.mmio_debug > option, check the backtraces and try to discover which read or write > operation is causing the error message. Then check if this is > happening because the register does not exist or because its power > well is down when the operation is being done. > > On my SKL machine, if I use i915.mmio_debug=999, this patch triggers > 42 WARNs just by booting. I didn't investigate them yet. Normal users > are only going to get a single WARN due to the default i915.mmio_debug > setting. > > Thank you for your comprehension, > Paulo > > Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Queued for -next because I'm just evil that way, thanks for the patch. -Daniel > --- > drivers/gpu/drm/i915/i915_drv.c | 3 +++ > drivers/gpu/drm/i915/intel_uncore.c | 5 +++++ > 2 files changed, 8 insertions(+) > > diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c > index 1d88745..6e03e11 100644 > --- a/drivers/gpu/drm/i915/i915_drv.c > +++ b/drivers/gpu/drm/i915/i915_drv.c > @@ -362,6 +362,7 @@ static const struct intel_device_info intel_skylake_info = { > .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING, > .has_llc = 1, > .has_ddi = 1, > + .has_fpga_dbg = 1, > .has_fbc = 1, > GEN_DEFAULT_PIPEOFFSETS, > IVB_CURSOR_OFFSETS, > @@ -374,6 +375,7 @@ static const struct intel_device_info intel_skylake_gt3_info = { > .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING | BSD2_RING, > .has_llc = 1, > .has_ddi = 1, > + .has_fpga_dbg = 1, > .has_fbc = 1, > GEN_DEFAULT_PIPEOFFSETS, > IVB_CURSOR_OFFSETS, > @@ -386,6 +388,7 @@ static const struct intel_device_info intel_broxton_info = { > .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING, > .num_pipes = 3, > .has_ddi = 1, > + .has_fpga_dbg = 1, > .has_fbc = 1, > GEN_DEFAULT_PIPEOFFSETS, > IVB_CURSOR_OFFSETS, > diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c > index 9d3c2e4..3fa1b89 100644 > --- a/drivers/gpu/drm/i915/intel_uncore.c > +++ b/drivers/gpu/drm/i915/intel_uncore.c > @@ -770,6 +770,7 @@ static u##x \ > gen9_read##x(struct drm_i915_private *dev_priv, off_t reg, bool trace) { \ > enum forcewake_domains fw_engine; \ > GEN6_READ_HEADER(x); \ > + hsw_unclaimed_reg_debug(dev_priv, reg, true, true); \ > if (!SKL_NEEDS_FORCE_WAKE((dev_priv), (reg))) \ > fw_engine = 0; \ > else if (FORCEWAKE_GEN9_RENDER_RANGE_OFFSET(reg)) \ > @@ -783,6 +784,7 @@ gen9_read##x(struct drm_i915_private *dev_priv, off_t reg, bool trace) { \ > if (fw_engine) \ > __force_wake_get(dev_priv, fw_engine); \ > val = __raw_i915_read##x(dev_priv, reg); \ > + hsw_unclaimed_reg_debug(dev_priv, reg, true, false); \ > GEN6_READ_FOOTER; \ > } > > @@ -983,6 +985,7 @@ gen9_write##x(struct drm_i915_private *dev_priv, off_t reg, u##x val, \ > bool trace) { \ > enum forcewake_domains fw_engine; \ > GEN6_WRITE_HEADER; \ > + hsw_unclaimed_reg_debug(dev_priv, reg, false, true); \ > if (!SKL_NEEDS_FORCE_WAKE((dev_priv), (reg)) || \ > is_gen9_shadowed(dev_priv, reg)) \ > fw_engine = 0; \ > @@ -997,6 +1000,8 @@ gen9_write##x(struct drm_i915_private *dev_priv, off_t reg, u##x val, \ > if (fw_engine) \ > __force_wake_get(dev_priv, fw_engine); \ > __raw_i915_write##x(dev_priv, reg, val); \ > + hsw_unclaimed_reg_debug(dev_priv, reg, false, false); \ > + hsw_unclaimed_reg_detect(dev_priv); \ > GEN6_WRITE_FOOTER; \ > } > > -- > 2.5.0 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c index 1d88745..6e03e11 100644 --- a/drivers/gpu/drm/i915/i915_drv.c +++ b/drivers/gpu/drm/i915/i915_drv.c @@ -362,6 +362,7 @@ static const struct intel_device_info intel_skylake_info = { .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING, .has_llc = 1, .has_ddi = 1, + .has_fpga_dbg = 1, .has_fbc = 1, GEN_DEFAULT_PIPEOFFSETS, IVB_CURSOR_OFFSETS, @@ -374,6 +375,7 @@ static const struct intel_device_info intel_skylake_gt3_info = { .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING | BSD2_RING, .has_llc = 1, .has_ddi = 1, + .has_fpga_dbg = 1, .has_fbc = 1, GEN_DEFAULT_PIPEOFFSETS, IVB_CURSOR_OFFSETS, @@ -386,6 +388,7 @@ static const struct intel_device_info intel_broxton_info = { .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING, .num_pipes = 3, .has_ddi = 1, + .has_fpga_dbg = 1, .has_fbc = 1, GEN_DEFAULT_PIPEOFFSETS, IVB_CURSOR_OFFSETS, diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c index 9d3c2e4..3fa1b89 100644 --- a/drivers/gpu/drm/i915/intel_uncore.c +++ b/drivers/gpu/drm/i915/intel_uncore.c @@ -770,6 +770,7 @@ static u##x \ gen9_read##x(struct drm_i915_private *dev_priv, off_t reg, bool trace) { \ enum forcewake_domains fw_engine; \ GEN6_READ_HEADER(x); \ + hsw_unclaimed_reg_debug(dev_priv, reg, true, true); \ if (!SKL_NEEDS_FORCE_WAKE((dev_priv), (reg))) \ fw_engine = 0; \ else if (FORCEWAKE_GEN9_RENDER_RANGE_OFFSET(reg)) \ @@ -783,6 +784,7 @@ gen9_read##x(struct drm_i915_private *dev_priv, off_t reg, bool trace) { \ if (fw_engine) \ __force_wake_get(dev_priv, fw_engine); \ val = __raw_i915_read##x(dev_priv, reg); \ + hsw_unclaimed_reg_debug(dev_priv, reg, true, false); \ GEN6_READ_FOOTER; \ } @@ -983,6 +985,7 @@ gen9_write##x(struct drm_i915_private *dev_priv, off_t reg, u##x val, \ bool trace) { \ enum forcewake_domains fw_engine; \ GEN6_WRITE_HEADER; \ + hsw_unclaimed_reg_debug(dev_priv, reg, false, true); \ if (!SKL_NEEDS_FORCE_WAKE((dev_priv), (reg)) || \ is_gen9_shadowed(dev_priv, reg)) \ fw_engine = 0; \ @@ -997,6 +1000,8 @@ gen9_write##x(struct drm_i915_private *dev_priv, off_t reg, u##x val, \ if (fw_engine) \ __force_wake_get(dev_priv, fw_engine); \ __raw_i915_write##x(dev_priv, reg, val); \ + hsw_unclaimed_reg_debug(dev_priv, reg, false, false); \ + hsw_unclaimed_reg_detect(dev_priv); \ GEN6_WRITE_FOOTER; \ }
Dear git bisect user, Even though this is the patch that introduced the WARN() you're bisecting, please notice that it's very likely that the problem you're facing was already present before this commit. In other words: this commit adds code to detect errors and give WARN()s about them, but the errors were already there. In order to continue your debug, please use the i915.mmio_debug option, check the backtraces and try to discover which read or write operation is causing the error message. Then check if this is happening because the register does not exist or because its power well is down when the operation is being done. On my SKL machine, if I use i915.mmio_debug=999, this patch triggers 42 WARNs just by booting. I didn't investigate them yet. Normal users are only going to get a single WARN due to the default i915.mmio_debug setting. Thank you for your comprehension, Paulo Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> --- drivers/gpu/drm/i915/i915_drv.c | 3 +++ drivers/gpu/drm/i915/intel_uncore.c | 5 +++++ 2 files changed, 8 insertions(+)