From patchwork Tue Aug 25 22:03:42 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Zanoni, Paulo R" X-Patchwork-Id: 7073471 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 52AD29F358 for ; Tue, 25 Aug 2015 22:04:11 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 7977620772 for ; Tue, 25 Aug 2015 22:04:10 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 89815207EA for ; Tue, 25 Aug 2015 22:04:09 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 0BA026E270; Tue, 25 Aug 2015 15:04:09 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by gabe.freedesktop.org (Postfix) with ESMTP id 871886E270 for ; Tue, 25 Aug 2015 15:04:08 -0700 (PDT) Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga101.jf.intel.com with ESMTP; 25 Aug 2015 15:04:08 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.17,412,1437462000"; d="scan'208";a="755346606" Received: from amunukut-mobl1.amr.corp.intel.com (HELO panetone.amr.corp.intel.com) ([10.254.191.82]) by orsmga001.jf.intel.com with ESMTP; 25 Aug 2015 15:04:07 -0700 From: Paulo Zanoni To: intel-gfx@lists.freedesktop.org Date: Tue, 25 Aug 2015 19:03:42 -0300 Message-Id: <1440540222-21401-2-git-send-email-paulo.r.zanoni@intel.com> X-Mailer: git-send-email 2.5.0 In-Reply-To: <1440540222-21401-1-git-send-email-paulo.r.zanoni@intel.com> References: <1440540222-21401-1-git-send-email-paulo.r.zanoni@intel.com> Subject: [Intel-gfx] [PATCH 2/2] drm/i915: restrict unclaimed register checking X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-5.5 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The unclaimed register bit is only triggered when someone touches the specified register range. For the normal use case (with i915.mmio_debug=0), this commit will avoid the extra __raw_i915_read32() call for every register outside the specified range, at the expense of a few additional "if" statements. Cc: Chris Wilson Signed-off-by: Paulo Zanoni Tested-By: Intel Graphics QA PRTS (Patch Regression Test System Contact: shuang.he@intel.com) --- drivers/gpu/drm/i915/intel_uncore.c | 14 ++++++++------ 1 file changed, 8 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c index 3fa1b89..894da40 100644 --- a/drivers/gpu/drm/i915/intel_uncore.c +++ b/drivers/gpu/drm/i915/intel_uncore.c @@ -596,6 +596,8 @@ void assert_forcewakes_inactive(struct drm_i915_private *dev_priv) !FORCEWAKE_GEN9_MEDIA_RANGE_OFFSET(reg) && \ !FORCEWAKE_GEN9_COMMON_RANGE_OFFSET(reg)) +#define UNCLAIMED_CHECK_RANGE(reg) REG_RANGE(reg, 0x40000, 0xC0000) + static void ilk_dummy_write(struct drm_i915_private *dev_priv) { @@ -612,7 +614,7 @@ hsw_unclaimed_reg_debug(struct drm_i915_private *dev_priv, u32 reg, bool read, const char *op = read ? "reading" : "writing to"; const char *when = before ? "before" : "after"; - if (!i915.mmio_debug) + if (!i915.mmio_debug || !UNCLAIMED_CHECK_RANGE(reg)) return; if (__raw_i915_read32(dev_priv, FPGA_DBG) & FPGA_DBG_RM_NOCLAIM) { @@ -624,11 +626,11 @@ hsw_unclaimed_reg_debug(struct drm_i915_private *dev_priv, u32 reg, bool read, } static void -hsw_unclaimed_reg_detect(struct drm_i915_private *dev_priv) +hsw_unclaimed_reg_detect(struct drm_i915_private *dev_priv, u32 reg) { static bool mmio_debug_once = true; - if (i915.mmio_debug || !mmio_debug_once) + if (i915.mmio_debug || !UNCLAIMED_CHECK_RANGE(reg) || !mmio_debug_once) return; if (__raw_i915_read32(dev_priv, FPGA_DBG) & FPGA_DBG_RM_NOCLAIM) { @@ -893,7 +895,7 @@ hsw_write##x(struct drm_i915_private *dev_priv, off_t reg, u##x val, bool trace) gen6_gt_check_fifodbg(dev_priv); \ } \ hsw_unclaimed_reg_debug(dev_priv, reg, false, false); \ - hsw_unclaimed_reg_detect(dev_priv); \ + hsw_unclaimed_reg_detect(dev_priv, reg); \ GEN6_WRITE_FOOTER; \ } @@ -935,7 +937,7 @@ gen8_write##x(struct drm_i915_private *dev_priv, off_t reg, u##x val, bool trace __force_wake_get(dev_priv, FORCEWAKE_RENDER); \ __raw_i915_write##x(dev_priv, reg, val); \ hsw_unclaimed_reg_debug(dev_priv, reg, false, false); \ - hsw_unclaimed_reg_detect(dev_priv); \ + hsw_unclaimed_reg_detect(dev_priv, reg); \ GEN6_WRITE_FOOTER; \ } @@ -1001,7 +1003,7 @@ gen9_write##x(struct drm_i915_private *dev_priv, off_t reg, u##x val, \ __force_wake_get(dev_priv, fw_engine); \ __raw_i915_write##x(dev_priv, reg, val); \ hsw_unclaimed_reg_debug(dev_priv, reg, false, false); \ - hsw_unclaimed_reg_detect(dev_priv); \ + hsw_unclaimed_reg_detect(dev_priv, reg); \ GEN6_WRITE_FOOTER; \ }