From patchwork Wed Aug 26 08:55:55 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maarten Lankhorst X-Patchwork-Id: 7075641 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 04D6E9F4DC for ; Wed, 26 Aug 2015 08:56:06 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 2903020917 for ; Wed, 26 Aug 2015 08:56:05 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 2266820914 for ; Wed, 26 Aug 2015 08:56:04 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id D16BB6E8CF; Wed, 26 Aug 2015 01:56:02 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mblankhorst.nl (mblankhorst.nl [141.105.120.124]) by gabe.freedesktop.org (Postfix) with ESMTPS id BAA586E8CF for ; Wed, 26 Aug 2015 01:56:01 -0700 (PDT) Received: from patser.lan (5ED48611.cm-7-5c.dynamic.ziggo.nl [94.212.134.17]) (using TLSv1 with cipher ECDHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) (Authenticated sender: mlankhorst) by mblankhorst.nl (Postfix) with ESMTPSA id 9FB2BE0002; Wed, 26 Aug 2015 10:55:59 +0200 (CEST) From: Maarten Lankhorst To: intel-gfx@lists.freedesktop.org Date: Wed, 26 Aug 2015 10:55:55 +0200 Message-Id: <1440579355-30104-2-git-send-email-maarten.lankhorst@linux.intel.com> X-Mailer: git-send-email 2.1.0 In-Reply-To: <1440579355-30104-1-git-send-email-maarten.lankhorst@linux.intel.com> References: <1440579355-30104-1-git-send-email-maarten.lankhorst@linux.intel.com> Subject: [Intel-gfx] [PATCH 2/2] drm/i915: Do not enable IPS with the primary plane disabled. X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-5.6 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This fixes kms_universal_plane.universal-plane-pipe-A-functional. IPS gets enabled even though the primary plane is disabled. This is not supported, and results in warnings like below: ------------[ cut here ]------------ WARNING: CPU: 0 PID: 1707 at drivers/gpu/drm/i915/intel_display.c:1354 assert_plane.constprop.66+0x70/0xa0 [i915]() plane A assertion failure (expected on, current off) Modules linked in: i915 CPU: 0 PID: 1707 Comm: kms_universal_p Tainted: G W 4.2.0-rc2-patser+ #4288 Hardware name: NUC5i7RYB, BIOS RYBDWi35.86A.0246.2015.0309.1355 03/09/2015 ffffffffc01d3278 ffff8800ccc37c88 ffffffff816f6e74 0000000080000000 ffff8800ccc37cd8 ffff8800ccc37cc8 ffffffff8107bfe1 ffff8800ccc37ca8 0000000000000000 ffff880117aa4520 ffff8800d7435388 ffff8800d5170000 Call Trace: [] dump_stack+0x4f/0x7b [] warn_slowpath_common+0x81/0xc0 [] warn_slowpath_fmt+0x41/0x50 [] assert_plane.constprop.66+0x70/0xa0 [i915] [] hsw_enable_ips+0x50/0x150 [i915] [] display_crc_ctl_write+0x623/0xbf0 [i915] [] __vfs_write+0x23/0xe0 [] ? __sb_start_write+0x44/0xf0 [] ? security_file_permission+0x38/0xc0 [] vfs_write+0xa4/0x190 [] ? do_setitimer+0x12e/0x220 [] SyS_write+0x41/0xa0 [] entry_SYSCALL_64_fastpath+0x12/0x6a ---[ end trace 264b7f8804a754c3 ]--- This can be fixed easily by checking primary->visible. Signed-off-by: Maarten Lankhorst Tested-By: Intel Graphics QA PRTS (Patch Regression Test System Contact: shuang.he@intel.com) --- drivers/gpu/drm/i915/i915_debugfs.c | 16 +++++++++++++--- 1 file changed, 13 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c index caf1382116de..9abf70cb3525 100644 --- a/drivers/gpu/drm/i915/i915_debugfs.c +++ b/drivers/gpu/drm/i915/i915_debugfs.c @@ -3799,7 +3799,13 @@ static int pipe_crc_set_source(struct drm_device *dev, enum pipe pipe, * user space can't make reliable use of the CRCs, so let's just * completely disable it. */ - hsw_disable_ips(crtc); + + if (HAS_IPS(dev) && pipe == PIPE_A) { + drm_modeset_lock(&crtc->base.primary->mutex, NULL); + if (to_intel_plane_state(crtc->base.primary->state)->visible) + hsw_disable_ips(crtc); + drm_modeset_unlock(&crtc->base.primary->mutex); + } spin_lock_irq(&pipe_crc->lock); kfree(pipe_crc->entries); @@ -3843,8 +3849,12 @@ static int pipe_crc_set_source(struct drm_device *dev, enum pipe pipe, vlv_undo_pipe_scramble_reset(dev, pipe); else if (IS_HASWELL(dev) && pipe == PIPE_A) hsw_undo_trans_edp_pipe_A_crc_wa(dev); - - hsw_enable_ips(crtc); + else if (HAS_IPS(dev) && pipe == PIPE_A) { + drm_modeset_lock(&crtc->base.primary->mutex, NULL); + if (to_intel_plane_state(crtc->base.primary->state)->visible) + hsw_enable_ips(crtc); + drm_modeset_unlock(&crtc->base.primary->mutex); + } } return 0;