| Message ID | 1441116710-14118-13-git-send-email-uma.shankar@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Tue, 01 Sep 2015, Uma Shankar <uma.shankar@intel.com> wrote: > In some cases, BIOS doesn't initializes DSI panel.DSI and > backlight registers are thereby not initialized. Programming > the same in driver backlight setup. > > Signed-off-by: Uma Shankar <uma.shankar@intel.com> This is probably obsolete now. See current bxt_setup_backlight. BR, Jani. > --- > drivers/gpu/drm/i915/i915_reg.h | 3 +++ > drivers/gpu/drm/i915/intel_panel.c | 11 +++++++++++ > 2 files changed, 14 insertions(+) > > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h > index 8407b5c..10f73b1 100644 > --- a/drivers/gpu/drm/i915/i915_reg.h > +++ b/drivers/gpu/drm/i915/i915_reg.h > @@ -7166,6 +7166,9 @@ enum skl_disp_power_wells { > #define TRANS_MSA_12_BPC (3<<5) > #define TRANS_MSA_16_BPC (4<<5) > > +/* Max CDCLK freq for BXT in HZ */ > +#define BXT_CDCLK_MAX 624000000 > + > /* LCPLL Control */ > #define LCPLL_CTL 0x130040 > #define LCPLL_PLL_DISABLE (1<<31) > diff --git a/drivers/gpu/drm/i915/intel_panel.c b/drivers/gpu/drm/i915/intel_panel.c > index 9fcf86c..8225cea 100644 > --- a/drivers/gpu/drm/i915/intel_panel.c > +++ b/drivers/gpu/drm/i915/intel_panel.c > @@ -1427,6 +1427,17 @@ bxt_setup_backlight(struct intel_connector *connector, enum pipe unused) > panel->backlight.max = I915_READ( > BXT_BLC_PWM_FREQ(panel->backlight.controller)); > > + if (!panel->backlight.max) { > + DRM_DEBUG_KMS("PWM freq not programmed by BIOS\n"); > + DRM_DEBUG_KMS("Programming PWM freq\n"); > + > + /* Max Backlight = Max CD Clock / pwm freq) */ > + panel->backlight.max = (BXT_CDCLK_MAX / > + dev_priv->vbt.backlight.pwm_freq_hz); > + I915_WRITE(BXT_BLC_PWM_FREQ(panel->backlight.controller), > + panel->backlight.max); > + } > + > val = bxt_get_backlight(connector); > panel->backlight.level = intel_panel_compute_brightness(connector, val); > > -- > 1.7.9.5 >
>-----Original Message----- >From: Nikula, Jani >Sent: Friday, September 18, 2015 7:03 PM >To: Shankar, Uma; intel-gfx@lists.freedesktop.org >Cc: Kumar, Shobhit; Deak, Imre; Shankar, Uma >Subject: Re: [BXT MIPI PATCH v3 12/14] drm/i915/bxt: Program Backlight PWM >frequency > >On Tue, 01 Sep 2015, Uma Shankar <uma.shankar@intel.com> wrote: >> In some cases, BIOS doesn't initializes DSI panel.DSI and backlight >> registers are thereby not initialized. Programming the same in driver >> backlight setup. >> >> Signed-off-by: Uma Shankar <uma.shankar@intel.com> > >This is probably obsolete now. See current bxt_setup_backlight. > >BR, >Jani. > Yeah, we can drop this patch since the values will be updated in VBT. Thanks Jani for notifying. >> --- >> drivers/gpu/drm/i915/i915_reg.h | 3 +++ >> drivers/gpu/drm/i915/intel_panel.c | 11 +++++++++++ >> 2 files changed, 14 insertions(+) >> >> diff --git a/drivers/gpu/drm/i915/i915_reg.h >> b/drivers/gpu/drm/i915/i915_reg.h index 8407b5c..10f73b1 100644 >> --- a/drivers/gpu/drm/i915/i915_reg.h >> +++ b/drivers/gpu/drm/i915/i915_reg.h >> @@ -7166,6 +7166,9 @@ enum skl_disp_power_wells { >> #define TRANS_MSA_12_BPC (3<<5) >> #define TRANS_MSA_16_BPC (4<<5) >> >> +/* Max CDCLK freq for BXT in HZ */ >> +#define BXT_CDCLK_MAX 624000000 >> + >> /* LCPLL Control */ >> #define LCPLL_CTL 0x130040 >> #define LCPLL_PLL_DISABLE (1<<31) >> diff --git a/drivers/gpu/drm/i915/intel_panel.c >> b/drivers/gpu/drm/i915/intel_panel.c >> index 9fcf86c..8225cea 100644 >> --- a/drivers/gpu/drm/i915/intel_panel.c >> +++ b/drivers/gpu/drm/i915/intel_panel.c >> @@ -1427,6 +1427,17 @@ bxt_setup_backlight(struct intel_connector >*connector, enum pipe unused) >> panel->backlight.max = I915_READ( >> BXT_BLC_PWM_FREQ(panel->backlight.controller)); >> >> + if (!panel->backlight.max) { >> + DRM_DEBUG_KMS("PWM freq not programmed by BIOS\n"); >> + DRM_DEBUG_KMS("Programming PWM freq\n"); >> + >> + /* Max Backlight = Max CD Clock / pwm freq) */ >> + panel->backlight.max = (BXT_CDCLK_MAX / >> + dev_priv->vbt.backlight.pwm_freq_hz); >> + I915_WRITE(BXT_BLC_PWM_FREQ(panel->backlight.controller), >> + panel->backlight.max); >> + } >> + >> val = bxt_get_backlight(connector); >> panel->backlight.level = intel_panel_compute_brightness(connector, >> val); >>
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 8407b5c..10f73b1 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -7166,6 +7166,9 @@ enum skl_disp_power_wells { #define TRANS_MSA_12_BPC (3<<5) #define TRANS_MSA_16_BPC (4<<5) +/* Max CDCLK freq for BXT in HZ */ +#define BXT_CDCLK_MAX 624000000 + /* LCPLL Control */ #define LCPLL_CTL 0x130040 #define LCPLL_PLL_DISABLE (1<<31) diff --git a/drivers/gpu/drm/i915/intel_panel.c b/drivers/gpu/drm/i915/intel_panel.c index 9fcf86c..8225cea 100644 --- a/drivers/gpu/drm/i915/intel_panel.c +++ b/drivers/gpu/drm/i915/intel_panel.c @@ -1427,6 +1427,17 @@ bxt_setup_backlight(struct intel_connector *connector, enum pipe unused) panel->backlight.max = I915_READ( BXT_BLC_PWM_FREQ(panel->backlight.controller)); + if (!panel->backlight.max) { + DRM_DEBUG_KMS("PWM freq not programmed by BIOS\n"); + DRM_DEBUG_KMS("Programming PWM freq\n"); + + /* Max Backlight = Max CD Clock / pwm freq) */ + panel->backlight.max = (BXT_CDCLK_MAX / + dev_priv->vbt.backlight.pwm_freq_hz); + I915_WRITE(BXT_BLC_PWM_FREQ(panel->backlight.controller), + panel->backlight.max); + } + val = bxt_get_backlight(connector); panel->backlight.level = intel_panel_compute_brightness(connector, val);
In some cases, BIOS doesn't initializes DSI panel.DSI and backlight registers are thereby not initialized. Programming the same in driver backlight setup. Signed-off-by: Uma Shankar <uma.shankar@intel.com> --- drivers/gpu/drm/i915/i915_reg.h | 3 +++ drivers/gpu/drm/i915/intel_panel.c | 11 +++++++++++ 2 files changed, 14 insertions(+)