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[4/6] drm/i915/guc: Don't send flips to GuC

Message ID 1441929372-26140-5-git-send-email-yu.dai@intel.com (mailing list archive)
State New, archived
Headers show

Commit Message

yu.dai@intel.com Sept. 10, 2015, 11:56 p.m. UTC 
From: Sagar Arun Kamble <sagar.a.kamble@intel.com>

Due to flip interrupts GuC stays awake always and GT does not enter RC6.
Do not route those interrupts to GuC for now.

Signed-off-by: Sagar Arun Kamble <sagar.a.kamble@intel.com>
---
 drivers/gpu/drm/i915/intel_guc_loader.c | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)
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Patch

diff --git a/drivers/gpu/drm/i915/intel_guc_loader.c b/drivers/gpu/drm/i915/intel_guc_loader.c
index 4eadcd2..3dcc656 100644
--- a/drivers/gpu/drm/i915/intel_guc_loader.c
+++ b/drivers/gpu/drm/i915/intel_guc_loader.c
@@ -110,11 +110,11 @@  static void direct_interrupts_to_guc(struct drm_i915_private *dev_priv)
 	for_each_ring(ring, dev_priv, i)
 		I915_WRITE(RING_MODE_GEN7(ring), irqs);
 
-	/* tell DE to send (all) flip_done to GuC */
-	irqs = DERRMR_PIPEA_PRI_FLIP_DONE | DERRMR_PIPEA_SPR_FLIP_DONE |
-	       DERRMR_PIPEB_PRI_FLIP_DONE | DERRMR_PIPEB_SPR_FLIP_DONE |
-	       DERRMR_PIPEC_PRI_FLIP_DONE | DERRMR_PIPEC_SPR_FLIP_DONE;
-	/* Unmasked bits will cause GuC response message to be sent */
+	/*
+	 * RC6 does not work if flips are directed to GuC as it is keeping
+	 * GuC Awake
+	*/
+	irqs = 0;
 	I915_WRITE(DE_GUCRMR, ~irqs);
 
 	/* route USER_INTERRUPT to Host, all others are sent to GuC. */