diff mbox

[14/43] drm/i915: Include MCHBAR_MIRROR_BASE in ILK_GDSR

Message ID 1442595836-23981-15-git-send-email-ville.syrjala@linux.intel.com (mailing list archive)
State New, archived
Headers show

Commit Message

Ville Syrjälä Sept. 18, 2015, 5:03 p.m. UTC 
From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/i915_reg.h     |  2 +-
 drivers/gpu/drm/i915/intel_uncore.c | 10 +++++-----
 2 files changed, 6 insertions(+), 6 deletions(-)

Comments

Jani Nikula Sept. 28, 2015, 11:44 a.m. UTC | #1 
On Fri, 18 Sep 2015, ville.syrjala@linux.intel.com wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Reviewed-by: Jani Nikula <jani.nikula@intel.com>


> ---
>  drivers/gpu/drm/i915/i915_reg.h     |  2 +-
>  drivers/gpu/drm/i915/intel_uncore.c | 10 +++++-----
>  2 files changed, 6 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index a04fa2a..610ce25 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -105,7 +105,7 @@
>  #define  GRDOM_RESET_STATUS (1<<1)
>  #define  GRDOM_RESET_ENABLE (1<<0)
>  
> -#define ILK_GDSR 0x2ca4 /* MCHBAR offset */
> +#define ILK_GDSR (MCHBAR_MIRROR_BASE + 0x2ca4)
>  #define  ILK_GRDOM_FULL		(0<<1)
>  #define  ILK_GRDOM_RENDER	(1<<1)
>  #define  ILK_GRDOM_MEDIA	(3<<1)
> diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
> index 440e2a5..3294f63 100644
> --- a/drivers/gpu/drm/i915/intel_uncore.c
> +++ b/drivers/gpu/drm/i915/intel_uncore.c
> @@ -1429,21 +1429,21 @@ static int ironlake_do_reset(struct drm_device *dev)
>  	struct drm_i915_private *dev_priv = dev->dev_private;
>  	int ret;
>  
> -	I915_WRITE(MCHBAR_MIRROR_BASE + ILK_GDSR,
> +	I915_WRITE(ILK_GDSR,
>  		   ILK_GRDOM_RENDER | ILK_GRDOM_RESET_ENABLE);
> -	ret = wait_for((I915_READ(MCHBAR_MIRROR_BASE + ILK_GDSR) &
> +	ret = wait_for((I915_READ(ILK_GDSR) &
>  			ILK_GRDOM_RESET_ENABLE) == 0, 500);
>  	if (ret)
>  		return ret;
>  
> -	I915_WRITE(MCHBAR_MIRROR_BASE + ILK_GDSR,
> +	I915_WRITE(ILK_GDSR,
>  		   ILK_GRDOM_MEDIA | ILK_GRDOM_RESET_ENABLE);
> -	ret = wait_for((I915_READ(MCHBAR_MIRROR_BASE + ILK_GDSR) &
> +	ret = wait_for((I915_READ(ILK_GDSR) &
>  			ILK_GRDOM_RESET_ENABLE) == 0, 500);
>  	if (ret)
>  		return ret;
>  
> -	I915_WRITE(MCHBAR_MIRROR_BASE + ILK_GDSR, 0);
> +	I915_WRITE(ILK_GDSR, 0);
>  
>  	return 0;
>  }
> -- 
> 2.4.6
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index a04fa2a..610ce25 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -105,7 +105,7 @@ 
 #define  GRDOM_RESET_STATUS (1<<1)
 #define  GRDOM_RESET_ENABLE (1<<0)
 
-#define ILK_GDSR 0x2ca4 /* MCHBAR offset */
+#define ILK_GDSR (MCHBAR_MIRROR_BASE + 0x2ca4)
 #define  ILK_GRDOM_FULL		(0<<1)
 #define  ILK_GRDOM_RENDER	(1<<1)
 #define  ILK_GRDOM_MEDIA	(3<<1)
diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
index 440e2a5..3294f63 100644
--- a/drivers/gpu/drm/i915/intel_uncore.c
+++ b/drivers/gpu/drm/i915/intel_uncore.c
@@ -1429,21 +1429,21 @@  static int ironlake_do_reset(struct drm_device *dev)
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	int ret;
 
-	I915_WRITE(MCHBAR_MIRROR_BASE + ILK_GDSR,
+	I915_WRITE(ILK_GDSR,
 		   ILK_GRDOM_RENDER | ILK_GRDOM_RESET_ENABLE);
-	ret = wait_for((I915_READ(MCHBAR_MIRROR_BASE + ILK_GDSR) &
+	ret = wait_for((I915_READ(ILK_GDSR) &
 			ILK_GRDOM_RESET_ENABLE) == 0, 500);
 	if (ret)
 		return ret;
 
-	I915_WRITE(MCHBAR_MIRROR_BASE + ILK_GDSR,
+	I915_WRITE(ILK_GDSR,
 		   ILK_GRDOM_MEDIA | ILK_GRDOM_RESET_ENABLE);
-	ret = wait_for((I915_READ(MCHBAR_MIRROR_BASE + ILK_GDSR) &
+	ret = wait_for((I915_READ(ILK_GDSR) &
 			ILK_GRDOM_RESET_ENABLE) == 0, 500);
 	if (ret)
 		return ret;
 
-	I915_WRITE(MCHBAR_MIRROR_BASE + ILK_GDSR, 0);
+	I915_WRITE(ILK_GDSR, 0);
 
 	return 0;
 }