| Message ID | 1442595836-23981-9-git-send-email-ville.syrjala@linux.intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Fri, 18 Sep 2015, ville.syrjala@linux.intel.com wrote: > From: Ville Syrjälä <ville.syrjala@linux.intel.com> > > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> > --- > drivers/gpu/drm/i915/i915_reg.h | 12 ++++-------- > drivers/gpu/drm/i915/intel_tv.c | 8 ++++---- > 2 files changed, 8 insertions(+), 12 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h > index b95f7f1..13b52f7 100644 > --- a/drivers/gpu/drm/i915/i915_reg.h > +++ b/drivers/gpu/drm/i915/i915_reg.h > @@ -4079,14 +4079,10 @@ enum skl_disp_power_wells { > # define TV_CC_DATA_1_MASK 0x0000007f > # define TV_CC_DATA_1_SHIFT 0 > > -#define TV_H_LUMA_0 0x68100 > -#define TV_H_LUMA_59 0x681ec > -#define TV_H_CHROMA_0 0x68200 > -#define TV_H_CHROMA_59 0x682ec > -#define TV_V_LUMA_0 0x68300 > -#define TV_V_LUMA_42 0x683a8 > -#define TV_V_CHROMA_0 0x68400 > -#define TV_V_CHROMA_42 0x684a8 > +#define TV_H_LUMA(i) (0x68100 + (i) * 4) /* 60 registers */ > +#define TV_H_CHROMA(i) (0x68200 + (i) * 4) /* 60 registers */ > +#define TV_V_LUMA(i) (0x68300 + (i) * 4) /* 43 registers */ > +#define TV_V_CHROMA(i) (0x68400 + (i) * 4) /* 43 registers */ > > /* Display Port */ > #define DP_A 0x64000 /* eDP */ > diff --git a/drivers/gpu/drm/i915/intel_tv.c b/drivers/gpu/drm/i915/intel_tv.c > index 29983cba..6bea789 100644 > --- a/drivers/gpu/drm/i915/intel_tv.c > +++ b/drivers/gpu/drm/i915/intel_tv.c > @@ -1138,13 +1138,13 @@ static void intel_tv_pre_enable(struct intel_encoder *encoder) > > j = 0; > for (i = 0; i < 60; i++) > - I915_WRITE(TV_H_LUMA_0 + (i<<2), tv_mode->filter_table[j++]); > + I915_WRITE(TV_H_LUMA(i), tv_mode->filter_table[j++]); > for (i = 0; i < 60; i++) > - I915_WRITE(TV_H_CHROMA_0 + (i<<2), tv_mode->filter_table[j++]); > + I915_WRITE(TV_H_CHROMA(i), tv_mode->filter_table[j++]); > for (i = 0; i < 43; i++) > - I915_WRITE(TV_V_LUMA_0 + (i<<2), tv_mode->filter_table[j++]); > + I915_WRITE(TV_V_LUMA(i), tv_mode->filter_table[j++]); > for (i = 0; i < 43; i++) > - I915_WRITE(TV_V_CHROMA_0 + (i<<2), tv_mode->filter_table[j++]); > + I915_WRITE(TV_V_CHROMA(i), tv_mode->filter_table[j++]); > I915_WRITE(TV_DAC, I915_READ(TV_DAC) & TV_DAC_SAVE); > I915_WRITE(TV_CTL, tv_ctl); > } > -- > 2.4.6 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index b95f7f1..13b52f7 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -4079,14 +4079,10 @@ enum skl_disp_power_wells { # define TV_CC_DATA_1_MASK 0x0000007f # define TV_CC_DATA_1_SHIFT 0 -#define TV_H_LUMA_0 0x68100 -#define TV_H_LUMA_59 0x681ec -#define TV_H_CHROMA_0 0x68200 -#define TV_H_CHROMA_59 0x682ec -#define TV_V_LUMA_0 0x68300 -#define TV_V_LUMA_42 0x683a8 -#define TV_V_CHROMA_0 0x68400 -#define TV_V_CHROMA_42 0x684a8 +#define TV_H_LUMA(i) (0x68100 + (i) * 4) /* 60 registers */ +#define TV_H_CHROMA(i) (0x68200 + (i) * 4) /* 60 registers */ +#define TV_V_LUMA(i) (0x68300 + (i) * 4) /* 43 registers */ +#define TV_V_CHROMA(i) (0x68400 + (i) * 4) /* 43 registers */ /* Display Port */ #define DP_A 0x64000 /* eDP */ diff --git a/drivers/gpu/drm/i915/intel_tv.c b/drivers/gpu/drm/i915/intel_tv.c index 29983cba..6bea789 100644 --- a/drivers/gpu/drm/i915/intel_tv.c +++ b/drivers/gpu/drm/i915/intel_tv.c @@ -1138,13 +1138,13 @@ static void intel_tv_pre_enable(struct intel_encoder *encoder) j = 0; for (i = 0; i < 60; i++) - I915_WRITE(TV_H_LUMA_0 + (i<<2), tv_mode->filter_table[j++]); + I915_WRITE(TV_H_LUMA(i), tv_mode->filter_table[j++]); for (i = 0; i < 60; i++) - I915_WRITE(TV_H_CHROMA_0 + (i<<2), tv_mode->filter_table[j++]); + I915_WRITE(TV_H_CHROMA(i), tv_mode->filter_table[j++]); for (i = 0; i < 43; i++) - I915_WRITE(TV_V_LUMA_0 + (i<<2), tv_mode->filter_table[j++]); + I915_WRITE(TV_V_LUMA(i), tv_mode->filter_table[j++]); for (i = 0; i < 43; i++) - I915_WRITE(TV_V_CHROMA_0 + (i<<2), tv_mode->filter_table[j++]); + I915_WRITE(TV_V_CHROMA(i), tv_mode->filter_table[j++]); I915_WRITE(TV_DAC, I915_READ(TV_DAC) & TV_DAC_SAVE); I915_WRITE(TV_CTL, tv_ctl); }