From patchwork Fri Sep 25 13:33:39 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: arun.siluvery@linux.intel.com X-Patchwork-Id: 7265061 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id B052CBEEC1 for ; Fri, 25 Sep 2015 13:34:05 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id DEE5420AE8 for ; Fri, 25 Sep 2015 13:34:04 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 0540420AE7 for ; Fri, 25 Sep 2015 13:34:04 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 6B7316F109; Fri, 25 Sep 2015 06:34:03 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTP id E34E96F10A for ; Fri, 25 Sep 2015 06:34:00 -0700 (PDT) Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga101.fm.intel.com with ESMTP; 25 Sep 2015 06:34:00 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.17,587,1437462000"; d="scan'208";a="797197163" Received: from asiluver-linux.isw.intel.com ([10.102.226.117]) by fmsmga001.fm.intel.com with ESMTP; 25 Sep 2015 06:34:00 -0700 From: Arun Siluvery To: intel-gfx@lists.freedesktop.org Date: Fri, 25 Sep 2015 14:33:39 +0100 Message-Id: <1443188026-1222-6-git-send-email-arun.siluvery@linux.intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1443188026-1222-1-git-send-email-arun.siluvery@linux.intel.com> References: <1443188026-1222-1-git-send-email-arun.siluvery@linux.intel.com> Cc: Mika Kuoppala Subject: [Intel-gfx] [PATCH 05/12] drm/i915/bxt: update WaSetHDCunitClckGatingDisable X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The implementation for this WA is same as WaSetHdcUnitClockGatingDisableInUcgctl6. Both of them are for BXT:A0 except that WaSetHdcUnitClockGatingDisableInUcgctl6 is applicable only when either SS0 or SS2 is active but if we apply the former WA then the latter one also gets applied irrespective of which SS is enabled. Signed-off-by: Arun Siluvery --- drivers/gpu/drm/i915/intel_pm.c | 15 ++++++++++----- 1 file changed, 10 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 093a5e4..c73d37d 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -124,12 +124,17 @@ static void bxt_init_clock_gating(struct drm_device *dev) I915_WRITE(GEN8_UCGCTL6, I915_READ(GEN8_UCGCTL6) | GEN8_SDEUNIT_CLOCK_GATE_DISABLE); - /* - * FIXME: - * GEN8_HDCUNIT_CLOCK_GATE_DISABLE_HDCREQ applies on 3x6 GT SKUs only. + /* WaSetHDCunitClckGatingDisable:bxt */ + /* WaSetHdcUnitClockGatingDisableInUcgctl6:bxt */ + /* The implementation is same for both of these WA except that + * WaSetHdcUnitClockGatingDisableInUcgctl6 is only applicable when + * either SS0 or SS2 is active but if we apply the first one then the + * second one also gets applied irrespective of which SS is enabled. */ - I915_WRITE(GEN8_UCGCTL6, I915_READ(GEN8_UCGCTL6) | - GEN8_HDCUNIT_CLOCK_GATE_DISABLE_HDCREQ); + if (INTEL_REVID(dev) == BXT_REVID_A0) { + I915_WRITE(GEN8_UCGCTL6, (I915_READ(GEN8_UCGCTL6) | + GEN8_HDCUNIT_CLOCK_GATE_DISABLE_HDCREQ)); + } if (INTEL_REVID(dev) == BXT_REVID_A0) { /*