From patchwork Tue Oct 6 14:26:47 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mika Kuoppala X-Patchwork-Id: 7335131 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id AB1579F750 for ; Tue, 6 Oct 2015 14:27:08 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id D7401206FD for ; Tue, 6 Oct 2015 14:27:07 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id DD593206F3 for ; Tue, 6 Oct 2015 14:27:05 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 584C06EAD4; Tue, 6 Oct 2015 07:27:05 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by gabe.freedesktop.org (Postfix) with ESMTP id 565AA6EA51 for ; Tue, 6 Oct 2015 07:27:03 -0700 (PDT) Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orsmga101.jf.intel.com with ESMTP; 06 Oct 2015 07:26:59 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.17,644,1437462000"; d="scan'208";a="820592940" Received: from rosetta.fi.intel.com (HELO rosetta) ([10.237.72.50]) by fmsmga002.fm.intel.com with ESMTP; 06 Oct 2015 07:26:58 -0700 Received: by rosetta (Postfix, from userid 1000) id 0697480092; Tue, 6 Oct 2015 17:26:56 +0300 (EEST) From: Mika Kuoppala To: intel-gfx@lists.freedesktop.org Date: Tue, 6 Oct 2015 17:26:47 +0300 Message-Id: <1444141613-11152-7-git-send-email-mika.kuoppala@intel.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1444141613-11152-1-git-send-email-mika.kuoppala@intel.com> References: <1444141613-11152-1-git-send-email-mika.kuoppala@intel.com> Cc: miku@iki.fi Subject: [Intel-gfx] [PATCH 06/12] drm/i915: Introduce mmio workaround list X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Introduce another workaround list for mmio write type of workarounds. No users yet. Cc: Arun Siluvery Signed-off-by: Mika Kuoppala --- drivers/gpu/drm/i915/i915_debugfs.c | 14 +++++++++----- drivers/gpu/drm/i915/i915_drv.h | 14 ++++++++++---- 2 files changed, 19 insertions(+), 9 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c index af44808..0c4e6bc 100644 --- a/drivers/gpu/drm/i915/i915_debugfs.c +++ b/drivers/gpu/drm/i915/i915_debugfs.c @@ -3095,7 +3095,8 @@ static int i915_shared_dplls_info(struct seq_file *m, void *unused) } static void print_wa_regs(struct seq_file *m, - const struct i915_workarounds *w) + const struct i915_workarounds *w, + const char *type) { struct drm_info_node *node = (struct drm_info_node *) m->private; struct drm_device *dev = node->minor->dev; @@ -3111,8 +3112,8 @@ static void print_wa_regs(struct seq_file *m, value = w->reg[i].value; read = I915_READ(addr); ok = (value & mask) == (read & mask); - seq_printf(m, "0x%X: 0x%08X, mask: 0x%08X, read: 0x%08x, status: %s\n", - addr, value, mask, read, ok ? "OK" : "FAIL"); + seq_printf(m, "0x%X: 0x%08X, mask: 0x%08X, read: 0x%08x, type: %s, status: %s\n", + addr, value, mask, read, type, ok ? "OK" : "FAIL"); } } @@ -3130,8 +3131,11 @@ static int i915_wa_registers(struct seq_file *m, void *unused) intel_runtime_pm_get(dev_priv); seq_printf(m, "Workarounds applied: %d\n", - dev_priv->lri_workarounds.count); - print_wa_regs(m, &dev_priv->lri_workarounds); + dev_priv->lri_workarounds.count + + dev_priv->mmio_workarounds.count); + + print_wa_regs(m, &dev_priv->lri_workarounds, " LRI"); + print_wa_regs(m, &dev_priv->mmio_workarounds, "MMIO"); intel_runtime_pm_put(dev_priv); mutex_unlock(&dev->struct_mutex); diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 0ed790c..ae5b6b3 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -1845,6 +1845,7 @@ struct drm_i915_private { int dpio_phy_iosf_port[I915_NUM_PHYS_VLV]; struct i915_workarounds lri_workarounds; + struct i915_workarounds mmio_workarounds; /* Reclocking support */ bool render_reclock_avail; @@ -3519,12 +3520,17 @@ static inline void i915_trace_irq_get(struct intel_engine_cs *ring, } /* Workaround register lists */ -#define WA_REG_LRI(addr, mask, val) do { \ - const int r = intel_wa_add(&dev_priv->lri_workarounds, \ - (addr), (mask), (val)); \ - WARN_ON(r); \ +#define WA_REG(wlist, addr, mask, val) do { \ + const int r = intel_wa_add((wlist), (addr), (mask), (val)); \ + WARN_ON(r); \ } while (0) +#define WA_REG_LRI(addr, mask, val) \ + WA_REG(&dev_priv->lri_workarounds, (addr), (mask), (val)) + +#define WA_REG_MMIO(addr, mask, val) \ + WA_REG(&dev_priv->mmio_workarounds, (addr), (mask), (val)) + #define WA_SET_BIT_MASKED(t, addr, mask) \ WA_REG_##t(addr, (mask), _MASKED_BIT_ENABLE(mask))