From patchwork Wed Oct 7 11:44:02 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Francisco Jerez X-Patchwork-Id: 7344631 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 7615CBF90C for ; Wed, 7 Oct 2015 11:41:46 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id BA21B2069B for ; Wed, 7 Oct 2015 11:41:45 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 32EFA206F9 for ; Wed, 7 Oct 2015 11:41:44 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id E011A6EAFA; Wed, 7 Oct 2015 04:41:42 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mx1.riseup.net (mx1.riseup.net [198.252.153.129]) by gabe.freedesktop.org (Postfix) with ESMTPS id CF13F6EAF7 for ; Wed, 7 Oct 2015 04:41:41 -0700 (PDT) Received: from piha.riseup.net (unknown [10.0.1.162]) (using TLSv1 with cipher ECDHE-RSA-AES256-SHA (256/256 bits)) (Client CN "*.riseup.net", Issuer "COMODO RSA Domain Validation Secure Server CA" (verified OK)) by mx1.riseup.net (Postfix) with ESMTPS id A92C8C26D8; Wed, 7 Oct 2015 04:41:41 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=riseup.net; s=squak; t=1444218101; bh=h4Soih8FVP53BxsF6fB9HORRLEB93egobeVOQgRf+Q4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=KXp8330mD5yl3GoZJwie7mXGLsfTfx3BAXK1JAyJAcl9NegA8oa5Siq0YWGze3CKE 0iVsHbIYz0L9cLenTdcbvqYcyqCH0r0ChQOJwQEr7srImMhBA6qjocwWMUqgMQCt9K 9ZLVzM2hJvycf3uo9bur0hh39ckaP9OLGwmwHMhI= Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: currojerez) with ESMTPSA id C8D3B1404B3 From: Francisco Jerez To: intel-gfx@lists.freedesktop.org Date: Wed, 7 Oct 2015 14:44:02 +0300 Message-Id: <1444218245-8430-3-git-send-email-currojerez@riseup.net> X-Mailer: git-send-email 2.5.1 In-Reply-To: <1444218245-8430-1-git-send-email-currojerez@riseup.net> References: <1444218245-8430-1-git-send-email-currojerez@riseup.net> X-Virus-Scanned: clamav-milter 0.98.7 at mx1.riseup.net X-Virus-Status: Clean Subject: [Intel-gfx] [PATCH 3/6] drm/i915: Hook up ring workaround writes at context creation time on Gen6-7. X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-4.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED, T_DKIM_INVALID, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP intel_rcs_ctx_init() emits all workaround register writes on the list to the ring, in addition to calling i915_gem_render_state_init(). The workaround list is currently empty on Gen6-7 so this shouldn't cause any functional changes. Signed-off-by: Francisco Jerez --- This is based on top of Daniel's "drm/i915: Resurrect golden context on gen6/7". [1] [1] https://patchwork.freedesktop.org/patch/60870/ drivers/gpu/drm/i915/intel_ringbuffer.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c index 3373516..e2e40d0 100644 --- a/drivers/gpu/drm/i915/intel_ringbuffer.c +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c @@ -2703,7 +2703,7 @@ int intel_init_render_ring_buffer(struct drm_device *dev) GEN8_RING_SEMAPHORE_INIT; } } else if (INTEL_INFO(dev)->gen >= 6) { - ring->init_context = i915_gem_render_state_init; + ring->init_context = intel_rcs_ctx_init; ring->add_request = gen6_add_request; ring->flush = gen7_render_ring_flush; if (INTEL_INFO(dev)->gen == 6)