From patchwork Tue Oct 20 12:34:39 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Sharma, Shashank" X-Patchwork-Id: 7446671 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 5F97C9F37F for ; Tue, 20 Oct 2015 12:26:44 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 87214206C7 for ; Tue, 20 Oct 2015 12:26:43 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id A3F8320694 for ; Tue, 20 Oct 2015 12:26:42 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 038B66EBFE; Tue, 20 Oct 2015 05:26:42 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by gabe.freedesktop.org (Postfix) with ESMTP id D3BEB6EBF8; Tue, 20 Oct 2015 05:26:40 -0700 (PDT) Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orsmga101.jf.intel.com with ESMTP; 20 Oct 2015 05:26:41 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.17,707,1437462000"; d="scan'208";a="831176746" Received: from shashanks-desktop.iind.intel.com ([10.223.26.81]) by fmsmga002.fm.intel.com with ESMTP; 20 Oct 2015 05:26:36 -0700 From: Shashank Sharma To: dri-devel@lists.freedesktop.org, intel-gfx@lists.freedesktop.org, emil.l.velikov@gmail.com, matthew.d.roper@intel.com, robert.bradford@intel.com, jim.bish@intel.com Date: Tue, 20 Oct 2015 18:04:39 +0530 Message-Id: <1445344492-8296-13-git-send-email-shashank.sharma@intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1445344492-8296-1-git-send-email-shashank.sharma@intel.com> References: <1445344492-8296-1-git-send-email-shashank.sharma@intel.com> Cc: annie.j.matheson@intel.com, kausalmalladi@gmail.com, daniel.vetter@intel.com Subject: [Intel-gfx] [PATCH v7 12/25] drm/i915: CHV: Load gamma color correction values X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP DRM color manager allows the driver to showcase its best color correction capabilities using the specific query property cm_coeff_after_ctm_property. The driver must loads the no. of coefficients for color correction as per the platform capability during the init time. This patch adds no of coefficitents for best gamma color correction modes possible in CHV, in device info structure, which is: Gamma(10 bit, CGM HW unit): 257 coeff These values will be loaded in cm_crtc_palette_capabilities_property during the CRTC init section, by color manager's attach function. Signed-off-by: Shashank Sharma Signed-off-by: Kausal Malladi --- drivers/gpu/drm/i915/i915_drv.c | 2 ++ drivers/gpu/drm/i915/intel_color_manager.h | 3 +++ 2 files changed, 5 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c index 760e0ce..7780de4 100644 --- a/drivers/gpu/drm/i915/i915_drv.c +++ b/drivers/gpu/drm/i915/i915_drv.c @@ -34,6 +34,7 @@ #include "i915_drv.h" #include "i915_trace.h" #include "intel_drv.h" +#include "intel_color_manager.h" #include #include @@ -349,6 +350,7 @@ static const struct intel_device_info intel_cherryview_info = { .gen = 8, .num_pipes = 3, .need_gfx_hws = 1, .has_hotplug = 1, .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING, + .num_samples_after_ctm = CHV_10BIT_GAMMA_MAX_VALS, .is_valleyview = 1, .display_mmio_offset = VLV_DISPLAY_BASE, GEN_CHV_PIPEOFFSETS, diff --git a/drivers/gpu/drm/i915/intel_color_manager.h b/drivers/gpu/drm/i915/intel_color_manager.h index eec52a7..a378fe1 100644 --- a/drivers/gpu/drm/i915/intel_color_manager.h +++ b/drivers/gpu/drm/i915/intel_color_manager.h @@ -48,3 +48,6 @@ CLEAR_BITS(target, start_bit, no_bits); \ target |= (bit_pattern << start_bit); \ } while (0) + +/* CHV */ +#define CHV_10BIT_GAMMA_MAX_VALS 257