From patchwork Fri Oct 23 10:02:04 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ander Conselvan de Oliveira X-Patchwork-Id: 7471561 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 566E69F1C3 for ; Fri, 23 Oct 2015 10:03:33 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 52054206E3 for ; Fri, 23 Oct 2015 10:03:32 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 43C9420667 for ; Fri, 23 Oct 2015 10:03:31 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 81DCE6E6CC; Fri, 23 Oct 2015 03:03:30 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by gabe.freedesktop.org (Postfix) with ESMTP id 3A3576E6CC for ; Fri, 23 Oct 2015 03:03:27 -0700 (PDT) Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by orsmga102.jf.intel.com with ESMTP; 23 Oct 2015 03:03:02 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.20,186,1444719600"; d="scan'208";a="817731491" Received: from linux.intel.com ([10.23.219.25]) by fmsmga001.fm.intel.com with ESMTP; 23 Oct 2015 03:03:02 -0700 Received: from localhost (aconselv-mobl3.ger.corp.intel.com [10.252.19.216]) by linux.intel.com (Postfix) with ESMTP id 6E2816A4087; Fri, 23 Oct 2015 03:02:01 -0700 (PDT) From: Ander Conselvan de Oliveira To: intel-gfx@lists.freedesktop.org, jim.bride@linux.intel.com, sivakumar.thulasimani@intel.com Date: Fri, 23 Oct 2015 13:02:04 +0300 Message-Id: <1445594525-7174-22-git-send-email-ander.conselvan.de.oliveira@intel.com> X-Mailer: git-send-email 2.4.3 In-Reply-To: <1445594525-7174-1-git-send-email-ander.conselvan.de.oliveira@intel.com> References: <1445594525-7174-1-git-send-email-ander.conselvan.de.oliveira@intel.com> Cc: Ander Conselvan de Oliveira Subject: [Intel-gfx] [PATCH 21/22] drm/i915: Remove old functions for maximum DP vswing and pre-emph levels X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Remove the old functions for maximum DP voltage swing and pre-emphasis levels, now that all platforms use the new intel_dp_signal_values struct. v2: Rebase Signed-off-by: Ander Conselvan de Oliveira --- drivers/gpu/drm/i915/intel_dp_signal_levels.c | 132 +------------------------- 1 file changed, 3 insertions(+), 129 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_dp_signal_levels.c b/drivers/gpu/drm/i915/intel_dp_signal_levels.c index d1eccd7..a972d86 100644 --- a/drivers/gpu/drm/i915/intel_dp_signal_levels.c +++ b/drivers/gpu/drm/i915/intel_dp_signal_levels.c @@ -23,98 +23,6 @@ #include "intel_drv.h" -/* These are source-specific values. */ -static uint8_t -_dp_voltage_max(struct intel_dp *intel_dp) -{ - struct drm_device *dev = intel_dp_to_dev(intel_dp); - struct drm_i915_private *dev_priv = dev->dev_private; - enum port port = dp_to_dig_port(intel_dp)->port; - - if (IS_BROXTON(dev)) - return DP_TRAIN_VOLTAGE_SWING_LEVEL_3; - else if (INTEL_INFO(dev)->gen >= 9) { - if (dev_priv->edp_low_vswing && port == PORT_A) - return DP_TRAIN_VOLTAGE_SWING_LEVEL_3; - return DP_TRAIN_VOLTAGE_SWING_LEVEL_2; - } else if (IS_VALLEYVIEW(dev)) - return DP_TRAIN_VOLTAGE_SWING_LEVEL_3; - else if (IS_GEN7(dev) && port == PORT_A) - return DP_TRAIN_VOLTAGE_SWING_LEVEL_2; - else if (HAS_PCH_CPT(dev) && port != PORT_A) - return DP_TRAIN_VOLTAGE_SWING_LEVEL_3; - else - return DP_TRAIN_VOLTAGE_SWING_LEVEL_2; -} - -static uint8_t -_dp_pre_emphasis_max(struct intel_dp *intel_dp, uint8_t voltage_swing) -{ - struct drm_device *dev = intel_dp_to_dev(intel_dp); - enum port port = dp_to_dig_port(intel_dp)->port; - - if (INTEL_INFO(dev)->gen >= 9) { - switch (voltage_swing & DP_TRAIN_VOLTAGE_SWING_MASK) { - case DP_TRAIN_VOLTAGE_SWING_LEVEL_0: - return DP_TRAIN_PRE_EMPH_LEVEL_3; - case DP_TRAIN_VOLTAGE_SWING_LEVEL_1: - return DP_TRAIN_PRE_EMPH_LEVEL_2; - case DP_TRAIN_VOLTAGE_SWING_LEVEL_2: - return DP_TRAIN_PRE_EMPH_LEVEL_1; - case DP_TRAIN_VOLTAGE_SWING_LEVEL_3: - return DP_TRAIN_PRE_EMPH_LEVEL_0; - default: - return DP_TRAIN_PRE_EMPH_LEVEL_0; - } - } else if (IS_HASWELL(dev) || IS_BROADWELL(dev)) { - switch (voltage_swing & DP_TRAIN_VOLTAGE_SWING_MASK) { - case DP_TRAIN_VOLTAGE_SWING_LEVEL_0: - return DP_TRAIN_PRE_EMPH_LEVEL_3; - case DP_TRAIN_VOLTAGE_SWING_LEVEL_1: - return DP_TRAIN_PRE_EMPH_LEVEL_2; - case DP_TRAIN_VOLTAGE_SWING_LEVEL_2: - return DP_TRAIN_PRE_EMPH_LEVEL_1; - case DP_TRAIN_VOLTAGE_SWING_LEVEL_3: - default: - return DP_TRAIN_PRE_EMPH_LEVEL_0; - } - } else if (IS_VALLEYVIEW(dev)) { - switch (voltage_swing & DP_TRAIN_VOLTAGE_SWING_MASK) { - case DP_TRAIN_VOLTAGE_SWING_LEVEL_0: - return DP_TRAIN_PRE_EMPH_LEVEL_3; - case DP_TRAIN_VOLTAGE_SWING_LEVEL_1: - return DP_TRAIN_PRE_EMPH_LEVEL_2; - case DP_TRAIN_VOLTAGE_SWING_LEVEL_2: - return DP_TRAIN_PRE_EMPH_LEVEL_1; - case DP_TRAIN_VOLTAGE_SWING_LEVEL_3: - default: - return DP_TRAIN_PRE_EMPH_LEVEL_0; - } - } else if (IS_GEN7(dev) && port == PORT_A) { - switch (voltage_swing & DP_TRAIN_VOLTAGE_SWING_MASK) { - case DP_TRAIN_VOLTAGE_SWING_LEVEL_0: - return DP_TRAIN_PRE_EMPH_LEVEL_2; - case DP_TRAIN_VOLTAGE_SWING_LEVEL_1: - case DP_TRAIN_VOLTAGE_SWING_LEVEL_2: - return DP_TRAIN_PRE_EMPH_LEVEL_1; - default: - return DP_TRAIN_PRE_EMPH_LEVEL_0; - } - } else { - switch (voltage_swing & DP_TRAIN_VOLTAGE_SWING_MASK) { - case DP_TRAIN_VOLTAGE_SWING_LEVEL_0: - return DP_TRAIN_PRE_EMPH_LEVEL_2; - case DP_TRAIN_VOLTAGE_SWING_LEVEL_1: - return DP_TRAIN_PRE_EMPH_LEVEL_2; - case DP_TRAIN_VOLTAGE_SWING_LEVEL_2: - return DP_TRAIN_PRE_EMPH_LEVEL_1; - case DP_TRAIN_VOLTAGE_SWING_LEVEL_3: - default: - return DP_TRAIN_PRE_EMPH_LEVEL_0; - } - } -} - static void hsw_set_signal_levels(struct intel_dp *intel_dp, uint8_t train_set) { @@ -647,47 +555,16 @@ static const struct signal_levels ivb_edp_signal_levels = { .set = ivb_edp_set_signal_levels, }; -static void -_update_signal_levels(struct intel_dp *intel_dp) -{ - struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); - struct drm_device *dev = intel_dig_port->base.base.dev; - uint32_t signal_levels, mask = 0; - - if (HAS_DDI(dev)) { - signal_levels = ddi_signal_levels(intel_dp); - - if (IS_BROXTON(dev)) - signal_levels = 0; - else - mask = DDI_BUF_EMP_MASK; - } else { - WARN(1, "Should be calling intel_dp->signal_levels->set instead."); - return; - } - - if (mask) - DRM_DEBUG_KMS("Using signal levels %08x\n", signal_levels); - - intel_dp->DP = (intel_dp->DP & ~mask) | signal_levels; -} - uint8_t intel_dp_voltage_max(struct intel_dp *intel_dp) { - if (intel_dp->signal_levels) - return intel_dp->signal_levels->max_voltage; - else - return _dp_voltage_max(intel_dp); + return intel_dp->signal_levels->max_voltage; } uint8_t intel_dp_pre_emphasis_max(struct intel_dp *intel_dp, uint8_t voltage_swing) { - if (intel_dp->signal_levels) - return intel_dp->signal_levels->max_pre_emph[voltage_swing]; - else - return _dp_pre_emphasis_max(intel_dp, voltage_swing); + return intel_dp->signal_levels->max_pre_emph[voltage_swing]; } void @@ -697,10 +574,7 @@ intel_dp_set_signal_levels(struct intel_dp *intel_dp) struct drm_i915_private *dev_priv = to_i915(dev); uint8_t train_set = intel_dp->train_set[0]; - if (intel_dp->signal_levels) - intel_dp->signal_levels->set(intel_dp, train_set); - else - _update_signal_levels(intel_dp); + intel_dp->signal_levels->set(intel_dp, train_set); DRM_DEBUG_KMS("Using vswing level %d\n", train_set & DP_TRAIN_VOLTAGE_SWING_MASK);