From patchwork Fri Oct 30 01:54:38 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Kasireddy, Vivek" X-Patchwork-Id: 7523151 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 8D07CBEEA4 for ; Fri, 30 Oct 2015 01:58:33 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 811882076D for ; Fri, 30 Oct 2015 01:58:32 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 284F620769 for ; Fri, 30 Oct 2015 01:58:31 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id D2D9B6E013; Thu, 29 Oct 2015 18:58:28 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTP id C61D76E013 for ; Thu, 29 Oct 2015 18:58:20 -0700 (PDT) Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by fmsmga101.fm.intel.com with ESMTP; 29 Oct 2015 18:58:20 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.20,217,1444719600"; d="scan'208";a="590716836" Received: from orsmsx105.amr.corp.intel.com ([10.22.225.132]) by FMSMGA003.fm.intel.com with ESMTP; 29 Oct 2015 18:58:19 -0700 Received: from vkasired-desk2.fm.intel.com (10.22.254.139) by ORSMSX105.amr.corp.intel.com (10.22.225.132) with Microsoft SMTP Server (TLS) id 14.3.248.2; Thu, 29 Oct 2015 18:58:18 -0700 From: Vivek Kasireddy To: Date: Thu, 29 Oct 2015 18:54:38 -0700 Message-ID: <1446170078-20792-1-git-send-email-vivek.kasireddy@intel.com> X-Mailer: git-send-email 2.4.3 In-Reply-To: <5632202E.9080208@linux.intel.com> References: <5632202E.9080208@linux.intel.com> MIME-Version: 1.0 X-Originating-IP: [10.22.254.139] Cc: Vivek Kasireddy Subject: [Intel-gfx] [PATCH] drm/i915: Skip fence installation for objects with rotated views (v4) X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP While pinning a fb object to the display plane, only install a fence if the object is using a normal view. This corresponds with the behavior found in i915_gem_object_do_pin() where the fencability criteria is determined only for objects with normal views. v2: Look at the object's map_and_fenceable flag to determine whether to install a fence or not (Chris). v3: Pin and unpin a fence only if the current view type is normal. v4: Extend the "view type is normal" check for pin_fence as well. Cc: Chris Wilson Cc: Tvrtko Ursulin Cc: Ville Syrjala Signed-off-by: Vivek Kasireddy Reviewed-by: Ville Syrjälä --- drivers/gpu/drm/i915/intel_display.c | 36 ++++++++++++++++++++---------------- 1 file changed, 20 insertions(+), 16 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 2fdfca1..9c80968 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -2419,22 +2419,24 @@ intel_pin_and_fence_fb_obj(struct drm_plane *plane, * framebuffer compression. For simplicity, we always install * a fence as the cost is not that onerous. */ - ret = i915_gem_object_get_fence(obj); - if (ret == -EDEADLK) { - /* - * -EDEADLK means there are no free fences - * no pending flips. - * - * This is propagated to atomic, but it uses - * -EDEADLK to force a locking recovery, so - * change the returned error to -EBUSY. - */ - ret = -EBUSY; - goto err_unpin; - } else if (ret) - goto err_unpin; + if (view.type == I915_GGTT_VIEW_NORMAL) { + ret = i915_gem_object_get_fence(obj); + if (ret == -EDEADLK) { + /* + * -EDEADLK means there are no free fences + * no pending flips. + * + * This is propagated to atomic, but it uses + * -EDEADLK to force a locking recovery, so + * change the returned error to -EBUSY. + */ + ret = -EBUSY; + goto err_unpin; + } else if (ret) + goto err_unpin; - i915_gem_object_pin_fence(obj); + i915_gem_object_pin_fence(obj); + } dev_priv->mm.interruptible = true; intel_runtime_pm_put(dev_priv); @@ -2460,7 +2462,9 @@ static void intel_unpin_fb_obj(struct drm_framebuffer *fb, ret = intel_fill_fb_ggtt_view(&view, fb, plane_state); WARN_ONCE(ret, "Couldn't get view from plane state!"); - i915_gem_object_unpin_fence(obj); + if (view.type == I915_GGTT_VIEW_NORMAL) + i915_gem_object_unpin_fence(obj); + i915_gem_object_unpin_from_display_plane(obj, &view); }