From patchwork Wed Nov 4 09:33:04 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mika Kuoppala X-Patchwork-Id: 7548491 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 218909F327 for ; Wed, 4 Nov 2015 09:33:27 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 3AF372061B for ; Wed, 4 Nov 2015 09:33:26 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 5407320613 for ; Wed, 4 Nov 2015 09:33:25 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id C43C96E2E2; Wed, 4 Nov 2015 01:33:24 -0800 (PST) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by gabe.freedesktop.org (Postfix) with ESMTP id DB9296E2E2 for ; Wed, 4 Nov 2015 01:33:22 -0800 (PST) Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by fmsmga102.fm.intel.com with ESMTP; 04 Nov 2015 01:33:22 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.20,242,1444719600"; d="scan'208";a="593774466" Received: from rosetta.fi.intel.com (HELO rosetta) ([10.237.72.50]) by FMSMGA003.fm.intel.com with ESMTP; 04 Nov 2015 01:33:20 -0800 Received: by rosetta (Postfix, from userid 1000) id 8FFEF81941; Wed, 4 Nov 2015 11:33:06 +0200 (EET) From: Mika Kuoppala To: intel-gfx@lists.freedesktop.org Date: Wed, 4 Nov 2015 11:33:04 +0200 Message-Id: <1446629584-10008-1-git-send-email-mika.kuoppala@intel.com> X-Mailer: git-send-email 2.5.0 Subject: [Intel-gfx] [PATCH] drm/i915: Request for resets under forcewake X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP We have a timed release of a forcewake when using I915_READ/WRITE macros. wait_for() macro will go to quite long sleep if the first read doesn't satisfy the condition for successful exit. With these two interacting, it is possible that we lose the forcewake during the wait_for() and the subsequent read will reaquire forcewake. Further experiments with skl shows that when we lose forcewake, we lose the reset request we submitted. So this register is not power context saved. Grab forcewakes for all engines before starting to request for resets so that all requests stay valid for the duration of reset requisition across all the engines. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=92774 Cc: Chris Wilson Tested-by: Tomi Sarvela Signed-off-by: Mika Kuoppala --- drivers/gpu/drm/i915/intel_uncore.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c index f0f97b2..5a6e7f1b 100644 --- a/drivers/gpu/drm/i915/intel_uncore.c +++ b/drivers/gpu/drm/i915/intel_uncore.c @@ -1483,6 +1483,8 @@ static int gen8_do_reset(struct drm_device *dev) struct intel_engine_cs *engine; int i; + intel_uncore_forcewake_get(dev_priv, FORCEWAKE_ALL); + for_each_ring(engine, dev_priv, i) { I915_WRITE(RING_RESET_CTL(engine->mmio_base), _MASKED_BIT_ENABLE(RESET_CTL_REQUEST_RESET)); @@ -1497,6 +1499,8 @@ static int gen8_do_reset(struct drm_device *dev) } } + intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL); + return gen6_do_reset(dev); not_ready: @@ -1504,6 +1508,8 @@ not_ready: I915_WRITE(RING_RESET_CTL(engine->mmio_base), _MASKED_BIT_DISABLE(RESET_CTL_REQUEST_RESET)); + intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL); + return -EIO; }