| Message ID | 1448278774-31376-4-git-send-email-John.C.Harrison@Intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On ma, 2015-11-23 at 11:38 +0000, John.C.Harrison@Intel.com wrote: > From: John Harrison <John.C.Harrison@Intel.com> > > A later patch in this series re-organises the batch buffer submission > code. Part of that is to reduce the scope of a pm_get/put pair. > Specifically, they previously wrapped the entire submission path from > the very start to the very end, now they only wrap the actual > hardware > submission part in the back half. > > While that is a good thing in general, it causes a problem with the > deferred context initialisation. That is done quite early on in the > execbuf code path - it happens at context validation time rather than > context switch time. Some of the deferred work requires the power to > be enabled. Hence this patch adds an explicit power reference count > to > the deferred initialisation code itself. > > Change-Id: Id7b1535dfd8809a2bd5546272de2bbec39da2868 > Issue: GMINL-5159 Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> > Signed-off-by: John Harrison <John.C.Harrison@Intel.com> > --- > drivers/gpu/drm/i915/intel_lrc.c | 9 ++++++++- > 1 file changed, 8 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/intel_lrc.c > b/drivers/gpu/drm/i915/intel_lrc.c > index 76fc245..e510730 100644 > --- a/drivers/gpu/drm/i915/intel_lrc.c > +++ b/drivers/gpu/drm/i915/intel_lrc.c > @@ -2470,6 +2470,8 @@ int intel_lr_context_deferred_alloc(struct > intel_context *ctx, > WARN_ON(ctx->legacy_hw_ctx.rcs_state != NULL); > WARN_ON(ctx->engine[ring->id].state); > > + intel_runtime_pm_get(dev->dev_private); > + > context_size = round_up(get_lr_context_size(ring), 4096); > > /* One extra page as the sharing data between driver and GuC > */ > @@ -2478,7 +2480,8 @@ int intel_lr_context_deferred_alloc(struct > intel_context *ctx, > ctx_obj = i915_gem_alloc_object(dev, context_size); > if (!ctx_obj) { > DRM_DEBUG_DRIVER("Alloc LRC backing obj failed.\n"); > - return -ENOMEM; > + ret = -ENOMEM; > + goto error_pm; > } > > ringbuf = intel_engine_create_ringbuffer(ring, 4 * > PAGE_SIZE); > @@ -2524,6 +2527,8 @@ int intel_lr_context_deferred_alloc(struct > intel_context *ctx, > } > i915_add_request_no_flush(req); > } > + > + intel_runtime_pm_put(dev->dev_private); > return 0; > > error_ringbuf: > @@ -2532,6 +2537,8 @@ error_deref_obj: > drm_gem_object_unreference(&ctx_obj->base); > ctx->engine[ring->id].ringbuf = NULL; > ctx->engine[ring->id].state = NULL; > +error_pm: > + intel_runtime_pm_put(dev->dev_private); > return ret; > } >
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c index 76fc245..e510730 100644 --- a/drivers/gpu/drm/i915/intel_lrc.c +++ b/drivers/gpu/drm/i915/intel_lrc.c @@ -2470,6 +2470,8 @@ int intel_lr_context_deferred_alloc(struct intel_context *ctx, WARN_ON(ctx->legacy_hw_ctx.rcs_state != NULL); WARN_ON(ctx->engine[ring->id].state); + intel_runtime_pm_get(dev->dev_private); + context_size = round_up(get_lr_context_size(ring), 4096); /* One extra page as the sharing data between driver and GuC */ @@ -2478,7 +2480,8 @@ int intel_lr_context_deferred_alloc(struct intel_context *ctx, ctx_obj = i915_gem_alloc_object(dev, context_size); if (!ctx_obj) { DRM_DEBUG_DRIVER("Alloc LRC backing obj failed.\n"); - return -ENOMEM; + ret = -ENOMEM; + goto error_pm; } ringbuf = intel_engine_create_ringbuffer(ring, 4 * PAGE_SIZE); @@ -2524,6 +2527,8 @@ int intel_lr_context_deferred_alloc(struct intel_context *ctx, } i915_add_request_no_flush(req); } + + intel_runtime_pm_put(dev->dev_private); return 0; error_ringbuf: @@ -2532,6 +2537,8 @@ error_deref_obj: drm_gem_object_unreference(&ctx_obj->base); ctx->engine[ring->id].ringbuf = NULL; ctx->engine[ring->id].state = NULL; +error_pm: + intel_runtime_pm_put(dev->dev_private); return ret; }