From patchwork Mon Nov 23 11:41:48 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Harrison X-Patchwork-Id: 7680411 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 606589F54F for ; Mon, 23 Nov 2015 11:42:38 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 57CD5206D7 for ; Mon, 23 Nov 2015 11:42:37 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id A52FC206E5 for ; Mon, 23 Nov 2015 11:42:35 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 0197A6E549; Mon, 23 Nov 2015 03:42:35 -0800 (PST) X-Original-To: Intel-GFX@lists.freedesktop.org Delivered-To: Intel-GFX@lists.freedesktop.org Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by gabe.freedesktop.org (Postfix) with ESMTP id F11566E544 for ; Mon, 23 Nov 2015 03:42:30 -0800 (PST) Received: from orsmga003.jf.intel.com ([10.7.209.27]) by orsmga103.jf.intel.com with ESMTP; 23 Nov 2015 03:42:31 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.20,336,1444719600"; d="scan'208";a="692487794" Received: from johnharr-linux.isw.intel.com ([10.102.226.93]) by orsmga003.jf.intel.com with ESMTP; 23 Nov 2015 03:42:31 -0800 From: John.C.Harrison@Intel.com To: Intel-GFX@Lists.FreeDesktop.Org Date: Mon, 23 Nov 2015 11:41:48 +0000 Message-Id: <1448278932-31551-14-git-send-email-John.C.Harrison@Intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1448278932-31551-1-git-send-email-John.C.Harrison@Intel.com> References: <1448278932-31551-1-git-send-email-John.C.Harrison@Intel.com> Organization: Intel Corporation (UK) Ltd. - Co. Reg. #1134945 - Pipers Way, Swindon SN3 1RJ Subject: [Intel-gfx] [RFC 13/37] drm/i915/guc: Improve action error reporting, add preemption debug X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-4.8 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Dave Gordon For: VIZ-2021 Signed-off-by: Dave Gordon --- drivers/gpu/drm/i915/i915_debugfs.c | 20 +++++++++++++------ drivers/gpu/drm/i915/i915_guc_submission.c | 32 ++++++++++++++++++++---------- drivers/gpu/drm/i915/intel_guc.h | 12 +++++++++-- 3 files changed, 45 insertions(+), 19 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c index 9e8f624..e9372ac 100644 --- a/drivers/gpu/drm/i915/i915_debugfs.c +++ b/drivers/gpu/drm/i915/i915_debugfs.c @@ -2693,7 +2693,7 @@ static int i915_guc_info(struct seq_file *m, void *data) struct i915_guc_client preempt = {}; struct intel_engine_cs *ring; enum intel_ring_id i; - u64 total = 0; + u64 total = 0, preempts = 0; if (!HAS_GUC_SCHED(dev_priv->dev)) return 0; @@ -2714,19 +2714,27 @@ static int i915_guc_info(struct seq_file *m, void *data) spin_unlock(&dev_priv->guc.host2guc_lock); seq_printf(m, "GuC total action count: %llu\n", guc.action_count); - seq_printf(m, "GuC action failure count: %u\n", guc.action_fail); seq_printf(m, "GuC last action command: 0x%x\n", guc.action_cmd); seq_printf(m, "GuC last action status: 0x%x\n", guc.action_status); - seq_printf(m, "GuC last action error code: %d\n", guc.action_err); + + seq_printf(m, "GuC action failure count: %u\n", guc.action_fail_count); + seq_printf(m, "GuC last failed action: 0x%x\n", guc.action_fail_cmd); + seq_printf(m, "GuC last failed status: 0x%x\n", guc.action_fail_status); + seq_printf(m, "GuC last error code: %d\n", guc.action_err); seq_printf(m, "\nGuC submissions:\n"); for_each_ring(ring, dev_priv, i) { - seq_printf(m, "\t%-24s: %10llu, last seqno 0x%08x %9d\n", - ring->name, guc.submissions[i], + seq_printf(m, "\t%-24s: %10llu, last %-8s 0x%08x %9d\n", + ring->name, guc.submissions[i], "seqno", guc.last_seqno[i], guc.last_seqno[i]); + seq_printf(m, "\t%-24s: %10u, last %-8s 0x%08x %9d\n", + " preemptions", guc.preemptions[i], "preempt", + guc.last_preempt[i], guc.last_preempt[i]); total += guc.submissions[i]; + preempts += guc.preemptions[i]; } - seq_printf(m, "\t%s: %llu\n", "Total", total); + seq_printf(m, "\t%s: %10llu\n", "Total regular", total); + seq_printf(m, "\t%s: %10llu\n", " preempts", preempts); seq_printf(m, "\nGuC execbuf client @ %p:\n", guc.execbuf_client); i915_guc_client_info(m, dev_priv, &client); diff --git a/drivers/gpu/drm/i915/i915_guc_submission.c b/drivers/gpu/drm/i915/i915_guc_submission.c index 4035ac6..38c431d 100644 --- a/drivers/gpu/drm/i915/i915_guc_submission.c +++ b/drivers/gpu/drm/i915/i915_guc_submission.c @@ -78,9 +78,8 @@ static inline bool host2guc_action_response(struct drm_i915_private *dev_priv, static int host2guc_action(struct intel_guc *guc, u32 *data, u32 len) { struct drm_i915_private *dev_priv = guc_to_i915(guc); - u32 status; - int i; - int ret; + u32 status, response; + int ret, i; if (WARN_ON(len < 1 || len > 15)) return -EINVAL; @@ -101,6 +100,8 @@ static int host2guc_action(struct intel_guc *guc, u32 *data, u32 len) /* No HOST2GUC command should take longer than 10ms */ ret = wait_for_atomic(host2guc_action_response(dev_priv, &status), 10); + response = I915_READ(SOFT_SCRATCH(15)); + dev_priv->guc.action_status = status; if (status != GUC2HOST_STATUS_SUCCESS) { /* * Either the GuC explicitly returned an error (which @@ -110,15 +111,15 @@ static int host2guc_action(struct intel_guc *guc, u32 *data, u32 len) if (ret != -ETIMEDOUT) ret = -EIO; - DRM_ERROR("GUC: host2guc action 0x%X failed. ret=%d " + DRM_ERROR("GuC: host2guc action 0x%X failed. ret=%d " "status=0x%08X response=0x%08X\n", - data[0], ret, status, - I915_READ(SOFT_SCRATCH(15))); + data[0], ret, status, response); - dev_priv->guc.action_fail += 1; + dev_priv->guc.action_fail_count += 1; + dev_priv->guc.action_fail_cmd = data[0]; + dev_priv->guc.action_fail_status = status; dev_priv->guc.action_err = ret; } - dev_priv->guc.action_status = status; spin_unlock(&dev_priv->guc.host2guc_lock); intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL); @@ -141,7 +142,7 @@ host2guc_preempt(struct i915_guc_client *client, struct intel_ringbuffer *ringbuf = ctx->engine[engine_id].ringbuf; struct guc_process_desc *desc; void *base; - u32 data[7]; + u32 data[8]; int ret; if (WARN_ON(!ctx_obj || !ringbuf)) @@ -672,8 +673,17 @@ int i915_guc_submit(struct i915_guc_client *client, spin_unlock_irqrestore(&client->wq_lock, flags); spin_lock(&guc->host2guc_lock); - guc->submissions[ring_id] += 1; - guc->last_seqno[ring_id] = rq->seqno; + if (preemptive) { + guc->preemptions[ring_id] += 1; + guc->last_preempt[ring_id] = rq->seqno; + if (q_ret) + guc->preempt_failures[ring_id] += 1; + } else { + guc->submissions[ring_id] += 1; + guc->last_seqno[ring_id] = rq->seqno; + if (q_ret) + guc->failures[ring_id] += 1; + } spin_unlock(&guc->host2guc_lock); return q_ret; diff --git a/drivers/gpu/drm/i915/intel_guc.h b/drivers/gpu/drm/i915/intel_guc.h index f56e0d9..0793713 100644 --- a/drivers/gpu/drm/i915/intel_guc.h +++ b/drivers/gpu/drm/i915/intel_guc.h @@ -105,11 +105,19 @@ struct intel_guc { uint64_t action_count; /* Total commands issued */ uint32_t action_cmd; /* Last command word */ uint32_t action_status; /* Last return status */ - uint32_t action_fail; /* Total number of failures */ - int32_t action_err; /* Last error code */ + uint32_t action_fail_count; /* Total number of failures */ + uint32_t action_fail_cmd; /* Last failed command */ + uint32_t action_fail_status; /* Last bad return status */ + int32_t action_err; /* Last (nonzero) error code */ + + /* Submission status & statistics */ uint64_t submissions[I915_NUM_RINGS]; uint32_t last_seqno[I915_NUM_RINGS]; + uint32_t failures[I915_NUM_RINGS]; + uint32_t preemptions[I915_NUM_RINGS]; + uint32_t last_preempt[I915_NUM_RINGS]; + uint32_t preempt_failures[I915_NUM_RINGS]; }; /* intel_guc_loader.c */