From patchwork Wed Nov 25 17:16:19 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marius Vlad X-Patchwork-Id: 7701701 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 009459F2E9 for ; Wed, 25 Nov 2015 17:17:18 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 23A5F2083A for ; Wed, 25 Nov 2015 17:17:17 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 170F120838 for ; Wed, 25 Nov 2015 17:17:15 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 82F1A6EAE5; Wed, 25 Nov 2015 09:17:14 -0800 (PST) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTP id 02EA56EAE5 for ; Wed, 25 Nov 2015 09:17:12 -0800 (PST) Received: from orsmga002.jf.intel.com ([10.7.209.21]) by fmsmga101.fm.intel.com with ESMTP; 25 Nov 2015 09:16:41 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.20,343,1444719600"; d="scan'208";a="859297011" Received: from mcvlad-wk.rb.intel.com (HELO mcvlad-wk) ([10.237.105.57]) by orsmga002.jf.intel.com with ESMTP; 25 Nov 2015 09:16:42 -0800 Received: by mcvlad-wk (Postfix, from userid 1000) id 33ED2C006C; Wed, 25 Nov 2015 19:16:57 +0200 (EET) From: marius.c.vlad@intel.com To: intel-gfx@lists.freedesktop.org, imre.deak@intel.com Date: Wed, 25 Nov 2015 19:16:19 +0200 Message-Id: <1448471779-24328-2-git-send-email-marius.c.vlad@intel.com> X-Mailer: git-send-email 2.6.2 In-Reply-To: <1448471779-24328-1-git-send-email-marius.c.vlad@intel.com> References: <1448405820.8137.33.camel@intel.com> <1448471779-24328-1-git-send-email-marius.c.vlad@intel.com> Subject: [Intel-gfx] [PATCH i-g-t] tests/pm_rpm tests for set_caching and set_tiling ioctl(s) X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-4.8 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Marius Vlad Signed-off-by: Marius Vlad --- tests/pm_rpm.c | 120 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 120 insertions(+) diff --git a/tests/pm_rpm.c b/tests/pm_rpm.c index c4fb19c..157cf29 100644 --- a/tests/pm_rpm.c +++ b/tests/pm_rpm.c @@ -1729,6 +1729,120 @@ static void planes_subtest(bool universal, bool dpms) } } +static void pm_test_tiling(void) +{ + uint32_t *handles; + uint8_t **gem_bufs; + + int max_gem_objs = 0; + uint8_t off_bit = 20; + uint32_t gtt_obj_max_size = (16 * 1024 * 1024); + + uint32_t i, j, tiling_modes[3] = { + I915_TILING_NONE, + I915_TILING_X, + I915_TILING_Y, + }; + uint32_t ti, sw; + + /* default value */ + uint32_t stride = 1024; + + /* calculate how many objects we can map */ + for (j = 1 << off_bit; j <= gtt_obj_max_size; j <<= 1, max_gem_objs++) + ; + + gem_bufs = calloc(max_gem_objs, sizeof(uint8_t *)); + handles = malloc(sizeof(uint32_t) * max_gem_objs); + + /* map to gtt and store some random data */ + for (i = 0, j = 1 << off_bit; j <= gtt_obj_max_size; j <<= 1, i++) { + handles[i] = gem_create(drm_fd, j); + gem_bufs[i] = gem_mmap__gtt(drm_fd, handles[i], j, PROT_WRITE); + memset(gem_bufs[i], 0x65, j); + } + + /* try to set different tiling for each handle */ + for (i = 0; i < ARRAY_SIZE(tiling_modes); i++) { + disable_all_screens_and_wait(&ms_data); + + for (j = 0; j < max_gem_objs; j++) { + gem_set_tiling(drm_fd, handles[j], tiling_modes[i], stride); + + gem_get_tiling(drm_fd, handles[j], &ti, &sw); + igt_assert(tiling_modes[i] == ti); + } + + enable_one_screen_and_wait(&ms_data); + } + + for (i = 0, j = 1 << off_bit; j <= gtt_obj_max_size; j <<= 1, i++) { + igt_assert(munmap(gem_bufs[i], j) == 0); + gem_close(drm_fd, handles[i]); + } + + free(gem_bufs); + free(handles); +} + +static void pm_test_caching(void) +{ + uint32_t *handles; + uint8_t **gem_bufs; + int8_t has_caching_display = -1; + + uint32_t i, j, got_caching; + uint32_t gtt_obj_max_size = (16 * 1024 * 1024); + uint32_t cache_levels[3] = { + I915_CACHING_NONE, + I915_CACHING_CACHED, /* LLC caching */ + I915_CACHING_DISPLAY, /* eDRAM caching */ + }; + + int max_gem_objs = 0; + uint8_t off_bit = 20; + + for (j = 1 << off_bit; j <= gtt_obj_max_size; j <<= 1, max_gem_objs++) + ; + + gem_bufs = calloc(max_gem_objs, sizeof(uint8_t *)); + handles = malloc(sizeof(uint32_t) * max_gem_objs); + + for (i = 0, j = 1 << off_bit; j <= gtt_obj_max_size; j <<= 1, i++) { + handles[i] = gem_create(drm_fd, j); + gem_bufs[i] = gem_mmap__gtt(drm_fd, handles[i], j, PROT_WRITE); + memset(gem_bufs[i], 0x65, j); + } + + /* figure out if we have cache display available on the platform */ + gem_set_caching(drm_fd, handles[0], I915_CACHING_DISPLAY); + if (gem_get_caching(drm_fd, handles[0])) + has_caching_display++; + + for (i = 0; i < ARRAY_SIZE(cache_levels) + has_caching_display; i++) { + disable_all_screens_and_wait(&ms_data); + + for (j = 0; j < max_gem_objs; j++) { + gem_set_caching(drm_fd, handles[j], cache_levels[i]); + + igt_debug("Verying cache for handle %u, level %u\n", j, i); + got_caching = gem_get_caching(drm_fd, handles[j]); + + igt_assert(got_caching == cache_levels[i]); + } + + enable_one_screen_and_wait(&ms_data); + } + + for (i = 0, j = 1 << off_bit; j <= gtt_obj_max_size; j <<= 1, i++) { + igt_assert(munmap(gem_bufs[i], j) == 0); + gem_close(drm_fd, handles[i]); + } + + free(handles); + free(gem_bufs); +} + static void fences_subtest(bool dpms) { int i; @@ -1927,6 +2041,12 @@ int main(int argc, char *argv[]) igt_subtest("gem-execbuf-stress-extra-wait") gem_execbuf_stress_subtest(rounds, WAIT_STATUS | WAIT_EXTRA); + /* power-wake reference tests */ + igt_subtest("pm-tiling") + pm_test_tiling(); + igt_subtest("pm-caching") + pm_test_caching(); + igt_fixture teardown_environment();