| Message ID | 1448893432-6978-12-git-send-email-ville.syrjala@linux.intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Mon, 30 Nov 2015, ville.syrjala@linux.intel.com wrote: > From: Ville Syrjälä <ville.syrjala@linux.intel.com> > > Now that the mess with AUX clock divder rounding is sorted out and > we have both cdclk and rawclk cached in dev_priv, we can clean up > the .get_aux_clock_divider() functions a bit. > > The main thing here is just calling ilk_get_aux_clock_divider() > from hsw_get_aux_clock_divider() except for the LPT:H special > case. > > We could got further and call g4x_get_aux_clock_divider() from > ilk_get_aux_clock_divider() for the PCH ports, but I'm sure Jani > would object, so leave that be. Thanks. :) Reviewed-by: Jani Nikula <jani.nikula@intel.com> > While at it repeat the comment where the AUX clock comes from > in ilk_get_aux_clock_divider(). > > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> > --- > drivers/gpu/drm/i915/intel_dp.c | 28 +++++++++++++++------------- > 1 file changed, 15 insertions(+), 13 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c > index 39a1689bac7d..df9fc396d18d 100644 > --- a/drivers/gpu/drm/i915/intel_dp.c > +++ b/drivers/gpu/drm/i915/intel_dp.c > @@ -677,22 +677,29 @@ static uint32_t g4x_get_aux_clock_divider(struct intel_dp *intel_dp, int index) > struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); > struct drm_i915_private *dev_priv = to_i915(intel_dig_port->base.base.dev); > > + if (index) > + return 0; > + > /* > * The clock divider is based off the hrawclk, and would like to run at > - * 2MHz. So, take the hrawclk value and divide by 2 and use that > + * 2MHz. So, take the hrawclk value and divide by 2000 and use that > */ > - return index ? 0 : DIV_ROUND_CLOSEST(dev_priv->rawclk_freq, 2000); > + return DIV_ROUND_CLOSEST(dev_priv->rawclk_freq, 2000); > } > > static uint32_t ilk_get_aux_clock_divider(struct intel_dp *intel_dp, int index) > { > struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); > - struct drm_device *dev = intel_dig_port->base.base.dev; > - struct drm_i915_private *dev_priv = dev->dev_private; > + struct drm_i915_private *dev_priv = to_i915(intel_dig_port->base.base.dev); > > if (index) > return 0; > > + /* > + * The clock divider is based off the cdclk or PCH rawclk, and would > + * like to run at 2MHz. So, take the cdclk or PCH rawclk value and > + * divide by 2000 and use that > + */ > if (intel_dig_port->port == PORT_A) > return DIV_ROUND_CLOSEST(dev_priv->cdclk_freq, 2000); > else > @@ -702,23 +709,18 @@ static uint32_t ilk_get_aux_clock_divider(struct intel_dp *intel_dp, int index) > static uint32_t hsw_get_aux_clock_divider(struct intel_dp *intel_dp, int index) > { > struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); > - struct drm_device *dev = intel_dig_port->base.base.dev; > - struct drm_i915_private *dev_priv = dev->dev_private; > + struct drm_i915_private *dev_priv = to_i915(intel_dig_port->base.base.dev); > > - if (intel_dig_port->port == PORT_A) { > - if (index) > - return 0; > - return DIV_ROUND_CLOSEST(dev_priv->cdclk_freq, 2000); > - } else if (HAS_PCH_LPT_H(dev_priv)) { > + if (intel_dig_port->port != PORT_A && HAS_PCH_LPT_H(dev_priv)) { > /* Workaround for non-ULT HSW */ > switch (index) { > case 0: return 63; > case 1: return 72; > default: return 0; > } > - } else { > - return index ? 0 : DIV_ROUND_CLOSEST(dev_priv->rawclk_freq, 2000); > } > + > + return ilk_get_aux_clock_divider(intel_dp, index); > } > > static uint32_t skl_get_aux_clock_divider(struct intel_dp *intel_dp, int index)
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index 39a1689bac7d..df9fc396d18d 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@ -677,22 +677,29 @@ static uint32_t g4x_get_aux_clock_divider(struct intel_dp *intel_dp, int index) struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); struct drm_i915_private *dev_priv = to_i915(intel_dig_port->base.base.dev); + if (index) + return 0; + /* * The clock divider is based off the hrawclk, and would like to run at - * 2MHz. So, take the hrawclk value and divide by 2 and use that + * 2MHz. So, take the hrawclk value and divide by 2000 and use that */ - return index ? 0 : DIV_ROUND_CLOSEST(dev_priv->rawclk_freq, 2000); + return DIV_ROUND_CLOSEST(dev_priv->rawclk_freq, 2000); } static uint32_t ilk_get_aux_clock_divider(struct intel_dp *intel_dp, int index) { struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); - struct drm_device *dev = intel_dig_port->base.base.dev; - struct drm_i915_private *dev_priv = dev->dev_private; + struct drm_i915_private *dev_priv = to_i915(intel_dig_port->base.base.dev); if (index) return 0; + /* + * The clock divider is based off the cdclk or PCH rawclk, and would + * like to run at 2MHz. So, take the cdclk or PCH rawclk value and + * divide by 2000 and use that + */ if (intel_dig_port->port == PORT_A) return DIV_ROUND_CLOSEST(dev_priv->cdclk_freq, 2000); else @@ -702,23 +709,18 @@ static uint32_t ilk_get_aux_clock_divider(struct intel_dp *intel_dp, int index) static uint32_t hsw_get_aux_clock_divider(struct intel_dp *intel_dp, int index) { struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); - struct drm_device *dev = intel_dig_port->base.base.dev; - struct drm_i915_private *dev_priv = dev->dev_private; + struct drm_i915_private *dev_priv = to_i915(intel_dig_port->base.base.dev); - if (intel_dig_port->port == PORT_A) { - if (index) - return 0; - return DIV_ROUND_CLOSEST(dev_priv->cdclk_freq, 2000); - } else if (HAS_PCH_LPT_H(dev_priv)) { + if (intel_dig_port->port != PORT_A && HAS_PCH_LPT_H(dev_priv)) { /* Workaround for non-ULT HSW */ switch (index) { case 0: return 63; case 1: return 72; default: return 0; } - } else { - return index ? 0 : DIV_ROUND_CLOSEST(dev_priv->rawclk_freq, 2000); } + + return ilk_get_aux_clock_divider(intel_dp, index); } static uint32_t skl_get_aux_clock_divider(struct intel_dp *intel_dp, int index)