From patchwork Tue Dec 8 16:42:02 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?VmlsbGUgU3lyasOkbMOk?= X-Patchwork-Id: 7800021 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id B4114BEEE5 for ; Tue, 8 Dec 2015 16:42:57 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 9712720462 for ; Tue, 8 Dec 2015 16:42:56 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 4AD5A204B5 for ; Tue, 8 Dec 2015 16:42:55 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 53C9B6E7F7; Tue, 8 Dec 2015 08:42:54 -0800 (PST) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTP id D327F6E7F4; Tue, 8 Dec 2015 08:42:52 -0800 (PST) Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga101.fm.intel.com with ESMTP; 08 Dec 2015 08:42:53 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.20,400,1444719600"; d="scan'208";a="856539282" Received: from stinkbox.fi.intel.com (HELO stinkbox) ([10.237.72.174]) by fmsmga001.fm.intel.com with SMTP; 08 Dec 2015 08:42:51 -0800 Received: by stinkbox (sSMTP sendmail emulation); Tue, 08 Dec 2015 18:42:49 +0200 From: ville.syrjala@linux.intel.com To: dri-devel@lists.freedesktop.org Date: Tue, 8 Dec 2015 18:42:02 +0200 Message-Id: <1449592922-5545-15-git-send-email-ville.syrjala@linux.intel.com> X-Mailer: git-send-email 2.4.10 In-Reply-To: <1449592922-5545-1-git-send-email-ville.syrjala@linux.intel.com> References: <1449592922-5545-1-git-send-email-ville.syrjala@linux.intel.com> MIME-Version: 1.0 Cc: intel-gfx@lists.freedesktop.org Subject: [Intel-gfx] [PATCH 14/14] drm/i915: Add debug prints for encoder modeset hooks X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Ville Syrjälä To get a better idea where exactly some error occurred during modeset, put in some debug prints to tell us when the variuous encoder hooks are getting called. Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/intel_display.c | 58 +++++++++++++++++------------------- 1 file changed, 28 insertions(+), 30 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index f302d4af3c05..4904207a7c32 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -4866,6 +4866,15 @@ static void intel_crtc_disable_planes(struct drm_crtc *crtc, unsigned plane_mask intel_frontbuffer_flip(dev, INTEL_FRONTBUFFER_ALL_MASK(pipe)); } +#define intel_call_encoder_func(encoder, func) \ +do { \ + if (!(encoder)->func) \ + break; \ + DRM_DEBUG_KMS("%s " #func " start\n", (encoder)->base.name); \ + (encoder)->func(encoder); \ + DRM_DEBUG_KMS("%s " #func " end\n", (encoder)->base.name); \ +} while (0) + static void ironlake_crtc_enable(struct drm_crtc *crtc) { struct drm_device *dev = crtc->dev; @@ -4900,8 +4909,7 @@ static void ironlake_crtc_enable(struct drm_crtc *crtc) intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, true); for_each_encoder_on_crtc(dev, crtc, encoder) - if (encoder->pre_enable) - encoder->pre_enable(encoder); + intel_call_encoder_func(encoder, pre_enable); if (intel_crtc->config->has_pch_encoder) { /* Note: FDI PLL enabling _must_ be done before we enable the @@ -4931,7 +4939,7 @@ static void ironlake_crtc_enable(struct drm_crtc *crtc) drm_crtc_vblank_on(crtc); for_each_encoder_on_crtc(dev, crtc, encoder) - encoder->enable(encoder); + intel_call_encoder_func(encoder, enable); if (HAS_PCH_CPT(dev)) cpt_verify_modeset(dev, intel_crtc->pipe); @@ -4996,10 +5004,8 @@ static void haswell_crtc_enable(struct drm_crtc *crtc) else intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, true); - for_each_encoder_on_crtc(dev, crtc, encoder) { - if (encoder->pre_enable) - encoder->pre_enable(encoder); - } + for_each_encoder_on_crtc(dev, crtc, encoder) + intel_call_encoder_func(encoder, pre_enable); if (intel_crtc->config->has_pch_encoder) dev_priv->display.fdi_link_train(crtc); @@ -5035,7 +5041,7 @@ static void haswell_crtc_enable(struct drm_crtc *crtc) drm_crtc_vblank_on(crtc); for_each_encoder_on_crtc(dev, crtc, encoder) { - encoder->enable(encoder); + intel_call_encoder_func(encoder, enable); intel_opregion_notify_encoder(encoder, true); } @@ -5085,7 +5091,7 @@ static void ironlake_crtc_disable(struct drm_crtc *crtc) intel_set_pch_fifo_underrun_reporting(dev_priv, pipe, false); for_each_encoder_on_crtc(dev, crtc, encoder) - encoder->disable(encoder); + intel_call_encoder_func(encoder, disable); drm_crtc_vblank_off(crtc); assert_vblank_disabled(crtc); @@ -5108,8 +5114,7 @@ static void ironlake_crtc_disable(struct drm_crtc *crtc) } for_each_encoder_on_crtc(dev, crtc, encoder) - if (encoder->post_disable) - encoder->post_disable(encoder); + intel_call_encoder_func(encoder, post_disable); if (intel_crtc->config->has_pch_encoder) { ironlake_disable_pch_transcoder(dev_priv, pipe); @@ -5154,7 +5159,7 @@ static void haswell_crtc_disable(struct drm_crtc *crtc) for_each_encoder_on_crtc(dev, crtc, encoder) { intel_opregion_notify_encoder(encoder, false); - encoder->disable(encoder); + intel_call_encoder_func(encoder, disable); } drm_crtc_vblank_off(crtc); @@ -5177,8 +5182,7 @@ static void haswell_crtc_disable(struct drm_crtc *crtc) intel_ddi_disable_pipe_clock(intel_crtc); for_each_encoder_on_crtc(dev, crtc, encoder) - if (encoder->post_disable) - encoder->post_disable(encoder); + intel_call_encoder_func(encoder, post_disable); if (intel_crtc->config->has_pch_encoder) { lpt_disable_pch_transcoder(dev_priv); @@ -6200,8 +6204,7 @@ static void valleyview_crtc_enable(struct drm_crtc *crtc) intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, true); for_each_encoder_on_crtc(dev, crtc, encoder) - if (encoder->pre_pll_enable) - encoder->pre_pll_enable(encoder); + intel_call_encoder_func(encoder, pre_pll_enable); if (!intel_crtc->config->has_dsi_encoder) { if (IS_CHERRYVIEW(dev)) { @@ -6214,8 +6217,7 @@ static void valleyview_crtc_enable(struct drm_crtc *crtc) } for_each_encoder_on_crtc(dev, crtc, encoder) - if (encoder->pre_enable) - encoder->pre_enable(encoder); + intel_call_encoder_func(encoder, pre_enable); i9xx_pfit_enable(intel_crtc); @@ -6227,7 +6229,7 @@ static void valleyview_crtc_enable(struct drm_crtc *crtc) drm_crtc_vblank_on(crtc); for_each_encoder_on_crtc(dev, crtc, encoder) - encoder->enable(encoder); + intel_call_encoder_func(encoder, enable); } static void i9xx_set_pll_dividers(struct intel_crtc *crtc) @@ -6265,8 +6267,7 @@ static void i9xx_crtc_enable(struct drm_crtc *crtc) intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, true); for_each_encoder_on_crtc(dev, crtc, encoder) - if (encoder->pre_enable) - encoder->pre_enable(encoder); + intel_call_encoder_func(encoder, pre_enable); i9xx_enable_pll(intel_crtc); @@ -6281,7 +6282,7 @@ static void i9xx_crtc_enable(struct drm_crtc *crtc) drm_crtc_vblank_on(crtc); for_each_encoder_on_crtc(dev, crtc, encoder) - encoder->enable(encoder); + intel_call_encoder_func(encoder, enable); intel_fbc_enable(intel_crtc); } @@ -6318,7 +6319,7 @@ static void i9xx_crtc_disable(struct drm_crtc *crtc) intel_wait_for_vblank(dev, pipe); for_each_encoder_on_crtc(dev, crtc, encoder) - encoder->disable(encoder); + intel_call_encoder_func(encoder, disable); drm_crtc_vblank_off(crtc); assert_vblank_disabled(crtc); @@ -6328,8 +6329,7 @@ static void i9xx_crtc_disable(struct drm_crtc *crtc) i9xx_pfit_disable(intel_crtc); for_each_encoder_on_crtc(dev, crtc, encoder) - if (encoder->post_disable) - encoder->post_disable(encoder); + intel_call_encoder_func(encoder, post_disable); if (!intel_crtc->config->has_dsi_encoder) { if (IS_CHERRYVIEW(dev)) @@ -6341,8 +6341,7 @@ static void i9xx_crtc_disable(struct drm_crtc *crtc) } for_each_encoder_on_crtc(dev, crtc, encoder) - if (encoder->post_pll_disable) - encoder->post_pll_disable(encoder); + intel_call_encoder_func(encoder, post_pll_disable); if (!IS_GEN2(dev)) intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, false); @@ -15527,9 +15526,8 @@ static void intel_sanitize_encoder(struct intel_encoder *encoder) DRM_DEBUG_KMS("[ENCODER:%d:%s] manually disabled\n", encoder->base.base.id, encoder->base.name); - encoder->disable(encoder); - if (encoder->post_disable) - encoder->post_disable(encoder); + intel_call_encoder_func(encoder, disable); + intel_call_encoder_func(encoder, post_disable); } encoder->base.crtc = NULL;