diff mbox

[BXT,MIPI,2/2] drm/i915: dual link pipe selection for bxt

Message ID 1449662398-663-2-git-send-email-m.deepak@intel.com (mailing list archive)
State New, archived
Headers show

Commit Message

Deepak M Dec. 9, 2015, 11:59 a.m. UTC
Pipe is assigned based on the port, but it should be
based on current crtc. Correcting the same in this patch.

Signed-off-by: Deepak M <m.deepak@intel.com>
---
 drivers/gpu/drm/i915/intel_dsi.c | 23 ++++++++++++++---------
 1 file changed, 14 insertions(+), 9 deletions(-)

Comments

Daniel Vetter Dec. 9, 2015, 8:19 a.m. UTC | #1
On Wed, Dec 09, 2015 at 05:29:58PM +0530, Deepak M wrote:
> Pipe is assigned based on the port, but it should be
> based on current crtc. Correcting the same in this patch.
> 
> Signed-off-by: Deepak M <m.deepak@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_dsi.c | 23 ++++++++++++++---------
>  1 file changed, 14 insertions(+), 9 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_dsi.c b/drivers/gpu/drm/i915/intel_dsi.c
> index f5df49b..0654b33 100644
> --- a/drivers/gpu/drm/i915/intel_dsi.c
> +++ b/drivers/gpu/drm/i915/intel_dsi.c
> @@ -898,20 +898,25 @@ static void intel_dsi_prepare(struct intel_encoder *intel_encoder)
>  			I915_WRITE(MIPI_CTRL(port), tmp |
>  					READ_REQUEST_PRIORITY_HIGH);
>  		} else if (IS_BROXTON(dev)) {
> -			/*
> -			 * FIXME:
> -			 * BXT can connect any PIPE to any MIPI port.
> -			 * Select the pipe based on the MIPI port read from
> -			 * VBT for now. Pick PIPE A for MIPI port A and C
> -			 * for port C.
> -			 */
> +			enum pipe pipe = intel_crtc->pipe;
> +
>  			tmp = I915_READ(MIPI_CTRL(port));
>  			tmp &= ~BXT_PIPE_SELECT_MASK;
>  
> -			if (port == PORT_A)
> +			switch (pipe) {
> +			case PIPE_A:
>  				tmp |= BXT_PIPE_SELECT_A;
> -			else if (port == PORT_C)
> +				break;
> +			case PIPE_B:
> +				tmp |= BXT_PIPE_SELECT_B;
> +				break;
> +			case PIPE_C:
>  				tmp |= BXT_PIPE_SELECT_C;

Please create a BXT_PIPE_SELECT(pipe) macro like we have for all the other
outputs that support more than 1 pipe selection bit. See e.g.
DP_PIPE_SELECT_CHV.
-Daniel

> +				break;
> +			default:
> +				DRM_ERROR("Unknown pipe used\n");
> +				return;
> +			}
>  
>  			I915_WRITE(MIPI_CTRL(port), tmp);
>  		}
> -- 
> 1.9.1
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
Deepak M Dec. 9, 2015, 9:49 a.m. UTC | #2
> -----Original Message-----
> From: Daniel Vetter [mailto:daniel.vetter@ffwll.ch] On Behalf Of Daniel
> Vetter
> Sent: Wednesday, December 9, 2015 1:50 PM
> To: Deepak, M <m.deepak@intel.com>
> Cc: intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [BXT MIPI PATCH 2/2] drm/i915: dual link pipe
> selection for bxt
> 
> On Wed, Dec 09, 2015 at 05:29:58PM +0530, Deepak M wrote:
> > Pipe is assigned based on the port, but it should be based on current
> > crtc. Correcting the same in this patch.
> >
> > Signed-off-by: Deepak M <m.deepak@intel.com>
> > ---
> >  drivers/gpu/drm/i915/intel_dsi.c | 23 ++++++++++++++---------
> >  1 file changed, 14 insertions(+), 9 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_dsi.c
> > b/drivers/gpu/drm/i915/intel_dsi.c
> > index f5df49b..0654b33 100644
> > --- a/drivers/gpu/drm/i915/intel_dsi.c
> > +++ b/drivers/gpu/drm/i915/intel_dsi.c
> > @@ -898,20 +898,25 @@ static void intel_dsi_prepare(struct intel_encoder
> *intel_encoder)
> >  			I915_WRITE(MIPI_CTRL(port), tmp |
> >  					READ_REQUEST_PRIORITY_HIGH);
> >  		} else if (IS_BROXTON(dev)) {
> > -			/*
> > -			 * FIXME:
> > -			 * BXT can connect any PIPE to any MIPI port.
> > -			 * Select the pipe based on the MIPI port read from
> > -			 * VBT for now. Pick PIPE A for MIPI port A and C
> > -			 * for port C.
> > -			 */
> > +			enum pipe pipe = intel_crtc->pipe;
> > +
> >  			tmp = I915_READ(MIPI_CTRL(port));
> >  			tmp &= ~BXT_PIPE_SELECT_MASK;
> >
> > -			if (port == PORT_A)
> > +			switch (pipe) {
> > +			case PIPE_A:
> >  				tmp |= BXT_PIPE_SELECT_A;
> > -			else if (port == PORT_C)
> > +				break;
> > +			case PIPE_B:
> > +				tmp |= BXT_PIPE_SELECT_B;
> > +				break;
> > +			case PIPE_C:
> >  				tmp |= BXT_PIPE_SELECT_C;
> 
> Please create a BXT_PIPE_SELECT(pipe) macro like we have for all the other
> outputs that support more than 1 pipe selection bit. See e.g.
> DP_PIPE_SELECT_CHV.
> -Daniel
> 
[Deepak, M] Agreed,  Have tried to address this comment http://lists.freedesktop.org/archives/intel-gfx/2015-December/082431.html 
> > +				break;
> > +			default:
> > +				DRM_ERROR("Unknown pipe used\n");
> > +				return;
> > +			}
> >
> >  			I915_WRITE(MIPI_CTRL(port), tmp);
> >  		}
> > --
> > 1.9.1
> >
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
> 
> --
> Daniel Vetter
> Software Engineer, Intel Corporation
> http://blog.ffwll.ch
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/intel_dsi.c b/drivers/gpu/drm/i915/intel_dsi.c
index f5df49b..0654b33 100644
--- a/drivers/gpu/drm/i915/intel_dsi.c
+++ b/drivers/gpu/drm/i915/intel_dsi.c
@@ -898,20 +898,25 @@  static void intel_dsi_prepare(struct intel_encoder *intel_encoder)
 			I915_WRITE(MIPI_CTRL(port), tmp |
 					READ_REQUEST_PRIORITY_HIGH);
 		} else if (IS_BROXTON(dev)) {
-			/*
-			 * FIXME:
-			 * BXT can connect any PIPE to any MIPI port.
-			 * Select the pipe based on the MIPI port read from
-			 * VBT for now. Pick PIPE A for MIPI port A and C
-			 * for port C.
-			 */
+			enum pipe pipe = intel_crtc->pipe;
+
 			tmp = I915_READ(MIPI_CTRL(port));
 			tmp &= ~BXT_PIPE_SELECT_MASK;
 
-			if (port == PORT_A)
+			switch (pipe) {
+			case PIPE_A:
 				tmp |= BXT_PIPE_SELECT_A;
-			else if (port == PORT_C)
+				break;
+			case PIPE_B:
+				tmp |= BXT_PIPE_SELECT_B;
+				break;
+			case PIPE_C:
 				tmp |= BXT_PIPE_SELECT_C;
+				break;
+			default:
+				DRM_ERROR("Unknown pipe used\n");
+				return;
+			}
 
 			I915_WRITE(MIPI_CTRL(port), tmp);
 		}