| Message ID | 1450224829-14465-1-git-send-email-benjamin.widawsky@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Tue, Dec 15, 2015 at 04:13:49PM -0800, Ben Widawsky wrote: > This has been incorrect since the original commit from Oscar Mateo here: > commit 4da46e1e5bb7e7396fad172cdaffbe496562f3d8 > Author: Oscar Mateo <oscar.mateo@intel.com> > Date: Thu Jul 24 17:04:27 2014 +0100 > > drm/i915/bdw: GEN-specific logical ring emit request > > The command's offset field is only 10 bits, and this is correct in all the other > add_request commands. It's highly likely this this patch makes no functional > difference because the hardware will hopefully ignore 31:12 anyway. Technically > the existing code is wrong because the docs say the upper bits are MBZ. > Ultimately, the patch just clears up the confusion. > > NOTE: This patch was compile tested only. > NOTE2: The modern docs call it MI_STORE_DATA_INDEX not MI_STORE_DWORD_INDEX It doesn't use MI_STORE_DATA_INDEX, but a write to a specific memory address (MI_STORE_DWORD_IMM) as it is not storing in the per-context HWS but a global (per-engine) page. -Chris
On Wed, Dec 16, 2015 at 12:18:20AM +0000, Chris Wilson wrote: > On Tue, Dec 15, 2015 at 04:13:49PM -0800, Ben Widawsky wrote: > > This has been incorrect since the original commit from Oscar Mateo here: > > commit 4da46e1e5bb7e7396fad172cdaffbe496562f3d8 > > Author: Oscar Mateo <oscar.mateo@intel.com> > > Date: Thu Jul 24 17:04:27 2014 +0100 > > > > drm/i915/bdw: GEN-specific logical ring emit request > > > > The command's offset field is only 10 bits, and this is correct in all the other > > add_request commands. It's highly likely this this patch makes no functional > > difference because the hardware will hopefully ignore 31:12 anyway. Technically > > the existing code is wrong because the docs say the upper bits are MBZ. > > Ultimately, the patch just clears up the confusion. > > > > NOTE: This patch was compile tested only. > > NOTE2: The modern docs call it MI_STORE_DATA_INDEX not MI_STORE_DWORD_INDEX > > It doesn't use MI_STORE_DATA_INDEX, but a write to a specific memory > address (MI_STORE_DWORD_IMM) as it is not storing in the per-context HWS > but a global (per-engine) page. > -Chris > > -- > Chris Wilson, Intel Open Source Technology Centre You're right. I just noticed the cmd = MI_STORE_DWORD_IMM_GEN4. Sorry about that.
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c index 3aa6147..90d4dbb 100644 --- a/drivers/gpu/drm/i915/intel_lrc.c +++ b/drivers/gpu/drm/i915/intel_lrc.c @@ -1793,7 +1793,6 @@ static void bxt_a_set_seqno(struct intel_engine_cs *ring, u32 seqno) static int gen8_emit_request(struct drm_i915_gem_request *request) { struct intel_ringbuffer *ringbuf = request->ringbuf; - struct intel_engine_cs *ring = ringbuf->ring; u32 cmd; int ret; @@ -1811,8 +1810,7 @@ static int gen8_emit_request(struct drm_i915_gem_request *request) intel_logical_ring_emit(ringbuf, cmd); intel_logical_ring_emit(ringbuf, - (ring->status_page.gfx_addr + - (I915_GEM_HWS_INDEX << MI_STORE_DWORD_INDEX_SHIFT))); + I915_GEM_HWS_INDEX << MI_STORE_DWORD_INDEX_SHIFT); intel_logical_ring_emit(ringbuf, 0); intel_logical_ring_emit(ringbuf, i915_gem_request_get_seqno(request)); intel_logical_ring_emit(ringbuf, MI_USER_INTERRUPT);
This has been incorrect since the original commit from Oscar Mateo here: commit 4da46e1e5bb7e7396fad172cdaffbe496562f3d8 Author: Oscar Mateo <oscar.mateo@intel.com> Date: Thu Jul 24 17:04:27 2014 +0100 drm/i915/bdw: GEN-specific logical ring emit request The command's offset field is only 10 bits, and this is correct in all the other add_request commands. It's highly likely this this patch makes no functional difference because the hardware will hopefully ignore 31:12 anyway. Technically the existing code is wrong because the docs say the upper bits are MBZ. Ultimately, the patch just clears up the confusion. NOTE: This patch was compile tested only. NOTE2: The modern docs call it MI_STORE_DATA_INDEX not MI_STORE_DWORD_INDEX Cc: Oscar Mateo <oscar.mateo@intel.com> Cc: Damien Lespiau <damien.lespiau@intel.com> Signed-off-by: Ben Widawsky <benjamin.widawsky@intel.com> --- drivers/gpu/drm/i915/intel_lrc.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-)