From patchwork Wed Dec 16 00:13:49 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ben Widawsky X-Patchwork-Id: 7858211 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 2D3859F349 for ; Wed, 16 Dec 2015 00:14:19 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 555F32037F for ; Wed, 16 Dec 2015 00:14:18 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 109362037C for ; Wed, 16 Dec 2015 00:14:17 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 306546E803; Tue, 15 Dec 2015 16:14:16 -0800 (PST) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by gabe.freedesktop.org (Postfix) with ESMTP id 357136E803 for ; Tue, 15 Dec 2015 16:14:15 -0800 (PST) Received: from orsmga002.jf.intel.com ([10.7.209.21]) by orsmga102.jf.intel.com with ESMTP; 15 Dec 2015 16:13:51 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.20,434,1444719600"; d="scan'208";a="872308236" Received: from snipes.jf.intel.com (HELO snipes.localdomain) ([10.7.198.156]) by orsmga002.jf.intel.com with ESMTP; 15 Dec 2015 16:13:51 -0800 From: Ben Widawsky To: Intel GFX Date: Tue, 15 Dec 2015 16:13:49 -0800 Message-Id: <1450224829-14465-1-git-send-email-benjamin.widawsky@intel.com> X-Mailer: git-send-email 2.6.4 Cc: Ben Widawsky Subject: [Intel-gfx] [PATCH] drm/i915: Correct MI_STORE_DWORD_INDEX usage X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This has been incorrect since the original commit from Oscar Mateo here: commit 4da46e1e5bb7e7396fad172cdaffbe496562f3d8 Author: Oscar Mateo Date: Thu Jul 24 17:04:27 2014 +0100 drm/i915/bdw: GEN-specific logical ring emit request The command's offset field is only 10 bits, and this is correct in all the other add_request commands. It's highly likely this this patch makes no functional difference because the hardware will hopefully ignore 31:12 anyway. Technically the existing code is wrong because the docs say the upper bits are MBZ. Ultimately, the patch just clears up the confusion. NOTE: This patch was compile tested only. NOTE2: The modern docs call it MI_STORE_DATA_INDEX not MI_STORE_DWORD_INDEX Cc: Oscar Mateo Cc: Damien Lespiau Signed-off-by: Ben Widawsky --- drivers/gpu/drm/i915/intel_lrc.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c index 3aa6147..90d4dbb 100644 --- a/drivers/gpu/drm/i915/intel_lrc.c +++ b/drivers/gpu/drm/i915/intel_lrc.c @@ -1793,7 +1793,6 @@ static void bxt_a_set_seqno(struct intel_engine_cs *ring, u32 seqno) static int gen8_emit_request(struct drm_i915_gem_request *request) { struct intel_ringbuffer *ringbuf = request->ringbuf; - struct intel_engine_cs *ring = ringbuf->ring; u32 cmd; int ret; @@ -1811,8 +1810,7 @@ static int gen8_emit_request(struct drm_i915_gem_request *request) intel_logical_ring_emit(ringbuf, cmd); intel_logical_ring_emit(ringbuf, - (ring->status_page.gfx_addr + - (I915_GEM_HWS_INDEX << MI_STORE_DWORD_INDEX_SHIFT))); + I915_GEM_HWS_INDEX << MI_STORE_DWORD_INDEX_SHIFT); intel_logical_ring_emit(ringbuf, 0); intel_logical_ring_emit(ringbuf, i915_gem_request_get_seqno(request)); intel_logical_ring_emit(ringbuf, MI_USER_INTERRUPT);