From patchwork Tue Jan 5 13:50:00 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Kahola, Mika" X-Patchwork-Id: 7955051 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 3DF5D9F3F6 for ; Tue, 5 Jan 2016 13:49:19 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 5609F20383 for ; Tue, 5 Jan 2016 13:49:18 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 795FC2035D for ; Tue, 5 Jan 2016 13:49:17 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 00E0C6E55B; Tue, 5 Jan 2016 05:49:16 -0800 (PST) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by gabe.freedesktop.org (Postfix) with ESMTP id 527656E55C for ; Tue, 5 Jan 2016 05:49:15 -0800 (PST) Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by orsmga103.jf.intel.com with ESMTP; 05 Jan 2016 05:49:03 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.20,525,1444719600"; d="scan'208";a="874962170" Received: from sorvi.fi.intel.com ([10.237.72.161]) by fmsmga001.fm.intel.com with ESMTP; 05 Jan 2016 05:49:02 -0800 From: Mika Kahola To: intel-gfx@lists.freedesktop.org Date: Tue, 5 Jan 2016 15:50:00 +0200 Message-Id: <1452001802-9449-2-git-send-email-mika.kahola@intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1452001802-9449-1-git-send-email-mika.kahola@intel.com> References: <1452001802-9449-1-git-send-email-mika.kahola@intel.com> MIME-Version: 1.0 Cc: thierry.reding@gmail.com Subject: [Intel-gfx] [PATCH v6 1/3] drm/i915: Disable fast link training if DP config changes X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Disable DP link training optimization if DP link configuration changes. If one of the DP link parameters i.e. link rate or lane count changes the link training does no longer apply the previously computed drive current and pre-emphasis level. Instead, the link training is started with zero values. v6: Debug message update to use yesno() routine (Ville) v5: Commit message update. Split the original patch in two. This part considers only changes on link configuration. Removed unnecessary debug messages. (Ville) v4: Parameter and debug message naming improvements. Fix for link parameter check (Ville) v3: Remove cached old link parameters. Instead, disable fast link training feature when link parameters are set (Ville) v2: Readout DPCD register to check if no aux handshaking is required in link training (Ander) Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91393 Reviewed-by: Ville Syrjälä Signed-off-by: Mika Kahola --- drivers/gpu/drm/i915/intel_dp.c | 5 +++++ drivers/gpu/drm/i915/intel_dp_link_training.c | 3 +++ 2 files changed, 8 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index 796e3d3..6b36d82 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@ -1676,6 +1676,11 @@ found: void intel_dp_set_link_params(struct intel_dp *intel_dp, const struct intel_crtc_state *pipe_config) { + if (intel_dp->link_rate != pipe_config->port_clock || + intel_dp->lane_count != pipe_config->lane_count) { + intel_dp->train_set_valid = false; + } + intel_dp->link_rate = pipe_config->port_clock; intel_dp->lane_count = pipe_config->lane_count; } diff --git a/drivers/gpu/drm/i915/intel_dp_link_training.c b/drivers/gpu/drm/i915/intel_dp_link_training.c index 8888793..8f22c92 100644 --- a/drivers/gpu/drm/i915/intel_dp_link_training.c +++ b/drivers/gpu/drm/i915/intel_dp_link_training.c @@ -85,6 +85,9 @@ static bool intel_dp_reset_link_train(struct intel_dp *intel_dp, uint8_t dp_train_pat) { + DRM_DEBUG_KMS("link training optimization: %s\n", + yesno(intel_dp->train_set_valid)); + if (!intel_dp->train_set_valid) memset(intel_dp->train_set, 0, sizeof(intel_dp->train_set)); intel_dp_set_signal_levels(intel_dp);