From patchwork Mon Jan 11 09:16:37 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chris Wilson X-Patchwork-Id: 8000091 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id E0ECB9F8AA for ; Mon, 11 Jan 2016 09:20:30 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 1005820256 for ; Mon, 11 Jan 2016 09:20:30 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id AB21620251 for ; Mon, 11 Jan 2016 09:20:28 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 5EE2D6E248; Mon, 11 Jan 2016 01:20:26 -0800 (PST) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-wm0-f68.google.com (mail-wm0-f68.google.com [74.125.82.68]) by gabe.freedesktop.org (Postfix) with ESMTPS id 3EF4B6E240 for ; Mon, 11 Jan 2016 01:20:05 -0800 (PST) Received: by mail-wm0-f68.google.com with SMTP id u188so25293185wmu.0 for ; Mon, 11 Jan 2016 01:20:05 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=PI+cZGVuZZODArBvdvLpqkBt5cQQ6T8oJcwjMe8feVc=; b=PYJ7RxZgBaLmoQcPyxe3+lQhTaqxreKignXCXaOE0eJKaqRQ+jczdQiWpCP6S4e0Qp dHS3flv8ggp1ybF8DLdNlH+EKEtjsXle9X9vZT1lUC5aFcXl17Sw+PH1nyDNVQNilOmP 1u6iNDHqA5DkmgMcJt8KMTGU8boEPBuuE2fN+Zkn+/pmJFVjT8D+vO1IAV+lLzkIXD5r y629YrRmQVbPgxph8+YzNEGhBHS+tt3ddjXGR/+F5ZvbbnH6JCKTVATYfdyDzymeKCMr yRXi4QXtKibvc3uHA82lLTDnLCB/6bub0KsWWIB+5XQ4iDlVKagjyfB/rdnS9DvUSR70 0hCg== X-Received: by 10.28.180.193 with SMTP id d184mr4554736wmf.64.1452504004068; Mon, 11 Jan 2016 01:20:04 -0800 (PST) Received: from haswell.alporthouse.com ([78.156.65.138]) by smtp.gmail.com with ESMTPSA id v2sm11834679wmv.12.2016.01.11.01.20.03 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 11 Jan 2016 01:20:03 -0800 (PST) From: Chris Wilson To: intel-gfx@lists.freedesktop.org Date: Mon, 11 Jan 2016 09:16:37 +0000 Message-Id: <1452503961-14837-26-git-send-email-chris@chris-wilson.co.uk> X-Mailer: git-send-email 2.7.0.rc3 In-Reply-To: <1452503961-14837-1-git-send-email-chris@chris-wilson.co.uk> References: <1452503961-14837-1-git-send-email-chris@chris-wilson.co.uk> Subject: [Intel-gfx] [PATCH 026/190] drm/i915: Stop setting wraparound seqno on initialisation X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-4.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,RP_MATCHES_RCVD,T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP We have testcases to ensure that seqno wraparound works fine, so we can forgo forcing everyone to encounter seqno wraparound during early uptime. seqno wraparound incurs a full GPU stall so not forcing it will eliminate one jitter from the early system. Using the testcases, we have very deterministic testing which given how difficult it would be to debug an issue (GPU hang) stemming from a wraparound using pure postmortem analysis I see no value in forcing a wrap during boot. Advancing the global next_seqno after a GPU reset is equally pointless. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/i915_gem.c | 16 +--------------- 1 file changed, 1 insertion(+), 15 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index d125820c6309..a0744626a110 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c @@ -4814,14 +4814,6 @@ i915_gem_init_hw(struct drm_device *dev) } } - /* - * Increment the next seqno by 0x100 so we have a visible break - * on re-initialisation - */ - ret = i915_gem_set_seqno(dev, dev_priv->next_seqno+0x100); - if (ret) - goto out; - /* Now it is safe to go back round and do everything else: */ for_each_ring(ring, dev_priv, i) { struct drm_i915_gem_request *req; @@ -5001,13 +4993,7 @@ i915_gem_load(struct drm_device *dev) dev_priv->num_fence_regs = I915_READ(vgtif_reg(avail_rs.fence_num)); - /* - * Set initial sequence number for requests. - * Using this number allows the wraparound to happen early, - * catching any obvious problems. - */ - dev_priv->next_seqno = ((u32)~0 - 0x1100); - dev_priv->last_seqno = ((u32)~0 - 0x1101); + dev_priv->next_seqno = 1; /* Initialize fence registers to zero */ INIT_LIST_HEAD(&dev_priv->mm.fence_list);