| Message ID | 1452767287-8838-1-git-send-email-jani.nikula@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Thu, 2016-01-14 at 12:28 +0200, Jani Nikula wrote: > The enum mipi_dsi_pixel_format defines MIPI_DSI_FMT_RGB666 for the > "loose" 24 bpp format and MIPI_DSI_FMT_RGB666_PACKED for the 18 bpp > format. We have this the other way round, defining a loose version for > 24 bpp. > > Follow suit with what's in enum mipi_dsi_pixel_format to avoid future > confusion. Rename > > VID_MODE_FORMAT_RGB666 -> VID_MODE_FORMAT_RGB666_PACKED > VID_MODE_FORMAT_RGB666_LOOSE -> VID_MODE_FORMAT_RGB666 > Tested-by: Mika Kahola <mika.kahola@intel.com> > Signed-off-by: Jani Nikula <jani.nikula@intel.com> > --- > drivers/gpu/drm/i915/i915_reg.h | 4 ++-- > drivers/gpu/drm/i915/intel_dsi_panel_vbt.c | 2 +- > drivers/gpu/drm/i915/intel_dsi_pll.c | 4 ++-- > 3 files changed, 5 insertions(+), 5 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h > index 0a988895165f..379c61677334 100644 > --- a/drivers/gpu/drm/i915/i915_reg.h > +++ b/drivers/gpu/drm/i915/i915_reg.h > @@ -7849,8 +7849,8 @@ enum skl_disp_power_wells { > #define VID_MODE_FORMAT_MASK (0xf << 7) > #define VID_MODE_NOT_SUPPORTED (0 << 7) > #define VID_MODE_FORMAT_RGB565 (1 << 7) > -#define VID_MODE_FORMAT_RGB666 (2 << 7) > -#define VID_MODE_FORMAT_RGB666_LOOSE (3 << 7) > +#define VID_MODE_FORMAT_RGB666_PACKED (2 << 7) > +#define VID_MODE_FORMAT_RGB666 (3 << 7) > #define VID_MODE_FORMAT_RGB888 (4 << 7) > #define CMD_MODE_CHANNEL_NUMBER_SHIFT 5 > #define CMD_MODE_CHANNEL_NUMBER_MASK (3 << 5) > diff --git a/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c b/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c > index 1d43e6f37fc1..3f4b9712bffd 100644 > --- a/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c > +++ b/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c > @@ -420,7 +420,7 @@ struct drm_panel *vbt_panel_init(struct intel_dsi *intel_dsi, u16 panel_id) > intel_dsi->dual_link = mipi_config->dual_link; > intel_dsi->pixel_overlap = mipi_config->pixel_overlap; > > - if (intel_dsi->pixel_format == VID_MODE_FORMAT_RGB666) > + if (intel_dsi->pixel_format == VID_MODE_FORMAT_RGB666_PACKED) > bits_per_pixel = 18; > else if (intel_dsi->pixel_format == VID_MODE_FORMAT_RGB565) > bits_per_pixel = 16; > diff --git a/drivers/gpu/drm/i915/intel_dsi_pll.c b/drivers/gpu/drm/i915/intel_dsi_pll.c > index bb5e95a1a453..f70df2b42b23 100644 > --- a/drivers/gpu/drm/i915/intel_dsi_pll.c > +++ b/drivers/gpu/drm/i915/intel_dsi_pll.c > @@ -37,10 +37,10 @@ static int dsi_pixel_format_bpp(int pixel_format) > switch (pixel_format) { > default: > case VID_MODE_FORMAT_RGB888: > - case VID_MODE_FORMAT_RGB666_LOOSE: > + case VID_MODE_FORMAT_RGB666: > bpp = 24; > break; > - case VID_MODE_FORMAT_RGB666: > + case VID_MODE_FORMAT_RGB666_PACKED: > bpp = 18; > break; > case VID_MODE_FORMAT_RGB565:
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 0a988895165f..379c61677334 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -7849,8 +7849,8 @@ enum skl_disp_power_wells { #define VID_MODE_FORMAT_MASK (0xf << 7) #define VID_MODE_NOT_SUPPORTED (0 << 7) #define VID_MODE_FORMAT_RGB565 (1 << 7) -#define VID_MODE_FORMAT_RGB666 (2 << 7) -#define VID_MODE_FORMAT_RGB666_LOOSE (3 << 7) +#define VID_MODE_FORMAT_RGB666_PACKED (2 << 7) +#define VID_MODE_FORMAT_RGB666 (3 << 7) #define VID_MODE_FORMAT_RGB888 (4 << 7) #define CMD_MODE_CHANNEL_NUMBER_SHIFT 5 #define CMD_MODE_CHANNEL_NUMBER_MASK (3 << 5) diff --git a/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c b/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c index 1d43e6f37fc1..3f4b9712bffd 100644 --- a/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c +++ b/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c @@ -420,7 +420,7 @@ struct drm_panel *vbt_panel_init(struct intel_dsi *intel_dsi, u16 panel_id) intel_dsi->dual_link = mipi_config->dual_link; intel_dsi->pixel_overlap = mipi_config->pixel_overlap; - if (intel_dsi->pixel_format == VID_MODE_FORMAT_RGB666) + if (intel_dsi->pixel_format == VID_MODE_FORMAT_RGB666_PACKED) bits_per_pixel = 18; else if (intel_dsi->pixel_format == VID_MODE_FORMAT_RGB565) bits_per_pixel = 16; diff --git a/drivers/gpu/drm/i915/intel_dsi_pll.c b/drivers/gpu/drm/i915/intel_dsi_pll.c index bb5e95a1a453..f70df2b42b23 100644 --- a/drivers/gpu/drm/i915/intel_dsi_pll.c +++ b/drivers/gpu/drm/i915/intel_dsi_pll.c @@ -37,10 +37,10 @@ static int dsi_pixel_format_bpp(int pixel_format) switch (pixel_format) { default: case VID_MODE_FORMAT_RGB888: - case VID_MODE_FORMAT_RGB666_LOOSE: + case VID_MODE_FORMAT_RGB666: bpp = 24; break; - case VID_MODE_FORMAT_RGB666: + case VID_MODE_FORMAT_RGB666_PACKED: bpp = 18; break; case VID_MODE_FORMAT_RGB565:
The enum mipi_dsi_pixel_format defines MIPI_DSI_FMT_RGB666 for the "loose" 24 bpp format and MIPI_DSI_FMT_RGB666_PACKED for the 18 bpp format. We have this the other way round, defining a loose version for 24 bpp. Follow suit with what's in enum mipi_dsi_pixel_format to avoid future confusion. Rename VID_MODE_FORMAT_RGB666 -> VID_MODE_FORMAT_RGB666_PACKED VID_MODE_FORMAT_RGB666_LOOSE -> VID_MODE_FORMAT_RGB666 Signed-off-by: Jani Nikula <jani.nikula@intel.com> --- drivers/gpu/drm/i915/i915_reg.h | 4 ++-- drivers/gpu/drm/i915/intel_dsi_panel_vbt.c | 2 +- drivers/gpu/drm/i915/intel_dsi_pll.c | 4 ++-- 3 files changed, 5 insertions(+), 5 deletions(-)