| Message ID | 1452937580-3625-5-git-send-email-chris@chris-wilson.co.uk (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h index b30ad99a54bf..cdd9ac88b055 100644 --- a/drivers/gpu/drm/i915/intel_ringbuffer.h +++ b/drivers/gpu/drm/i915/intel_ringbuffer.h @@ -389,8 +389,9 @@ intel_ring_sync_index(struct intel_engine_cs *ring, static inline void intel_flush_status_page(struct intel_engine_cs *ring, int reg) { - drm_clflush_virt_range(&ring->status_page.page_addr[reg], - sizeof(uint32_t)); + mb(); + clflush(&ring->status_page.page_addr[reg]); + mb(); } static inline u32
Rather than call a function to compute the matching cachelines and clflush them, just call the clflush *instruction* directly. We also know that we can use the unpatched plain clflush rather than the clflushopt alternative. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Mika Kuoppala <mika.kuoppala@intel.com> Cc: Imre Deak <imre.deak@intel.com> --- drivers/gpu/drm/i915/intel_ringbuffer.h | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-)