Message ID | 1453316739-13296-17-git-send-email-ville.syrjala@linux.intel.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
On Wed, Jan 20, 2016 at 09:05:37PM +0200, ville.syrjala@linux.intel.com wrote: > From: Ville Syrjälä <ville.syrjala@linux.intel.com> > > intel_compute_page_offset() can dig up the correct pitch from the fb > itself, no need for the caller to pass it in. > > A bit of extra care is needed for the lower level > _intel_compute_page_offset() since that one gets called before the > rotated pitch under intel_fb is populated. Note that we don't actually > call it with anything but DRM_ROTATE_0 there so we wouldn't actually > look up the rotated pitch there, but still, leave the pitch as something > the caller has to pass to _intel_compute_page_offset() as an > indicator that something is a bit special. > > This leaves 'stride_div' in the skl plane update hooks as a mostly useless > variable so just get rid of it. > > v2: Add a note why stride_div got nuked > > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> > --- > drivers/gpu/drm/i915/intel_display.c | 30 ++++++++++++++++-------------- > drivers/gpu/drm/i915/intel_drv.h | 1 - > drivers/gpu/drm/i915/intel_sprite.c | 26 +++++++++++--------------- > 3 files changed, 27 insertions(+), 30 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c > index ef68892f4e0a..eb8ce8a99291 100644 > --- a/drivers/gpu/drm/i915/intel_display.c > +++ b/drivers/gpu/drm/i915/intel_display.c > @@ -2562,11 +2562,16 @@ static u32 _intel_compute_tile_offset(const struct drm_i915_private *dev_priv, > > unsigned int intel_compute_tile_offset(int *x, int *y, > const struct drm_framebuffer *fb, int plane, > - unsigned int pitch, > unsigned int rotation) > { > const struct drm_i915_private *dev_priv = to_i915(fb->dev); > unsigned int alignment = intel_surf_alignment(dev_priv, fb->modifier[plane]); > + unsigned int pitch; > + > + if (intel_rotation_90_or_270(rotation)) > + pitch = to_intel_framebuffer(fb)->rotated[plane].pitch; > + else > + pitch = fb->pitches[plane]; > > return _intel_compute_tile_offset(dev_priv, x, y, fb, plane, pitch, > rotation, alignment ? (alignment - 1) : 0); > @@ -2988,8 +2993,7 @@ static void i9xx_update_primary_plane(struct drm_plane *primary, > > if (INTEL_INFO(dev)->gen >= 4) > intel_crtc->dspaddr_offset = > - intel_compute_tile_offset(&x, &y, fb, 0, > - fb->pitches[0], rotation); > + intel_compute_tile_offset(&x, &y, fb, 0, rotation); > > if (rotation == BIT(DRM_ROTATE_180)) { > dspcntr |= DISPPLANE_ROTATE_180; > @@ -3091,8 +3095,7 @@ static void ironlake_update_primary_plane(struct drm_plane *primary, > intel_add_fb_offsets(&x, &y, fb, 0, rotation); > > intel_crtc->dspaddr_offset = > - intel_compute_tile_offset(&x, &y, fb, 0, > - fb->pitches[0], rotation); > + intel_compute_tile_offset(&x, &y, fb, 0, rotation); > > if (rotation == BIT(DRM_ROTATE_180)) { > dspcntr |= DISPPLANE_ROTATE_180; > @@ -3263,7 +3266,7 @@ static void skylake_update_primary_plane(struct drm_plane *plane, > struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->base.crtc); > struct drm_framebuffer *fb = plane_state->base.fb; > int pipe = intel_crtc->pipe; > - u32 plane_ctl, stride_div, stride; > + u32 plane_ctl, stride; > unsigned int rotation = plane_state->base.rotation; > u32 surf_addr; > int scaler_id = plane_state->scaler_id; > @@ -3303,17 +3306,16 @@ static void skylake_update_primary_plane(struct drm_plane *plane, > src_w = drm_rect_width(&r); > src_h = drm_rect_height(&r); > > - stride_div = intel_tile_height(dev_priv, fb->modifier[0], cpp); > - stride = intel_fb->rotated[0].pitch; > + stride = intel_fb->rotated[0].pitch / > + intel_tile_height(dev_priv, fb->modifier[0], cpp); > } else { > - stride_div = intel_fb_stride_alignment(dev_priv, fb->modifier[0], > - fb->pixel_format); > - stride = fb->pitches[0]; > + stride = fb->pitches[0] / > + intel_fb_stride_alignment(dev_priv, fb->modifier[0], > + fb->pixel_format); > } > > intel_add_fb_offsets(&src_x, &src_y, fb, 0, rotation); > - surf_addr = intel_compute_tile_offset(&src_x, &src_y, fb, 0, > - stride, rotation); > + surf_addr = intel_compute_tile_offset(&src_x, &src_y, fb, 0, rotation); > > /* Sizes are 0 based */ > src_w--; > @@ -3326,7 +3328,7 @@ static void skylake_update_primary_plane(struct drm_plane *plane, > > I915_WRITE(PLANE_CTL(pipe, 0), plane_ctl); > I915_WRITE(PLANE_OFFSET(pipe, 0), (src_y << 16) | src_x); > - I915_WRITE(PLANE_STRIDE(pipe, 0), stride / stride_div); > + I915_WRITE(PLANE_STRIDE(pipe, 0), stride); > I915_WRITE(PLANE_SIZE(pipe, 0), (src_h << 16) | src_w); > > if (scaler_id >= 0) { > diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h > index 473b4cf9a2ff..e3de1fc3b04d 100644 > --- a/drivers/gpu/drm/i915/intel_drv.h > +++ b/drivers/gpu/drm/i915/intel_drv.h > @@ -1190,7 +1190,6 @@ void assert_pipe(struct drm_i915_private *dev_priv, enum pipe pipe, bool state); > #define assert_pipe_disabled(d, p) assert_pipe(d, p, false) > u32 intel_compute_tile_offset(int *x, int *y, > const struct drm_framebuffer *fb, int plane, > - unsigned int pitch, > unsigned int rotation); > void intel_prepare_reset(struct drm_device *dev); > void intel_finish_reset(struct drm_device *dev); > diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c > index 86176304155d..31be24f27207 100644 > --- a/drivers/gpu/drm/i915/intel_sprite.c > +++ b/drivers/gpu/drm/i915/intel_sprite.c > @@ -189,7 +189,7 @@ skl_update_plane(struct drm_plane *drm_plane, > struct intel_framebuffer *intel_fb = to_intel_framebuffer(fb); > const int pipe = intel_plane->pipe; > const int plane = intel_plane->plane + 1; > - u32 plane_ctl, stride_div, stride; > + u32 plane_ctl, stride; > const struct drm_intel_sprite_colorkey *key = &plane_state->ckey; > u32 surf_addr; > unsigned int rotation = plane_state->base.rotation; > @@ -241,17 +241,16 @@ skl_update_plane(struct drm_plane *drm_plane, > src_w = drm_rect_width(&r); > src_h = drm_rect_height(&r); > > - stride_div = intel_tile_height(dev_priv, fb->modifier[0], cpp); > - stride = intel_fb->rotated[0].pitch; > + stride = intel_fb->rotated[0].pitch / > + intel_tile_height(dev_priv, fb->modifier[0], cpp); > } else { > - stride_div = intel_fb_stride_alignment(dev_priv, fb->modifier[0], > - fb->pixel_format); > - stride = fb->pitches[0]; > + stride = fb->pitches[0] / > + intel_fb_stride_alignment(dev_priv, fb->modifier[0], > + fb->pixel_format); > } > > intel_add_fb_offsets(&x, &y, fb, 0, rotation); > - surf_addr = intel_compute_tile_offset(&x, &y, fb, 0, > - stride, rotation); > + surf_addr = intel_compute_tile_offset(&x, &y, fb, 0, rotation); > > /* Sizes are 0 based */ > src_w--; > @@ -260,7 +259,7 @@ skl_update_plane(struct drm_plane *drm_plane, > crtc_h--; > > I915_WRITE(PLANE_OFFSET(pipe, plane), (y << 16) | x); > - I915_WRITE(PLANE_STRIDE(pipe, plane), stride / stride_div); > + I915_WRITE(PLANE_STRIDE(pipe, plane), stride); > I915_WRITE(PLANE_SIZE(pipe, plane), (src_h << 16) | src_w); > > /* program plane scaler */ > @@ -428,8 +427,7 @@ vlv_update_plane(struct drm_plane *dplane, > crtc_h--; > > intel_add_fb_offsets(&x, &y, fb, 0, rotation); > - sprsurf_offset = intel_compute_tile_offset(&x, &y, fb, 0, > - fb->pitches[0], rotation); > + sprsurf_offset = intel_compute_tile_offset(&x, &y, fb, 0, rotation); > > if (rotation == BIT(DRM_ROTATE_180)) { > sprctl |= SP_ROTATE_180; > @@ -560,8 +558,7 @@ ivb_update_plane(struct drm_plane *plane, > sprscale = SPRITE_SCALE_ENABLE | (src_w << 16) | src_h; > > intel_add_fb_offsets(&x, &y, fb, 0, rotation); > - sprsurf_offset = intel_compute_tile_offset(&x, &y, fb, 0, > - fb->pitches[0], rotation); > + sprsurf_offset = intel_compute_tile_offset(&x, &y, fb, 0, rotation); > > if (rotation == BIT(DRM_ROTATE_180)) { > sprctl |= SPRITE_ROTATE_180; > @@ -696,8 +693,7 @@ ilk_update_plane(struct drm_plane *plane, > dvsscale = DVS_SCALE_ENABLE | (src_w << 16) | src_h; > > intel_add_fb_offsets(&x, &y, fb, 0, rotation); > - dvssurf_offset = intel_compute_tile_offset(&x, &y, fb, 0, > - fb->pitches[0], rotation); > + dvssurf_offset = intel_compute_tile_offset(&x, &y, fb, 0, rotation); > > if (rotation == BIT(DRM_ROTATE_180)) { > dvscntr |= DVS_ROTATE_180; > -- > 2.4.10 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index ef68892f4e0a..eb8ce8a99291 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -2562,11 +2562,16 @@ static u32 _intel_compute_tile_offset(const struct drm_i915_private *dev_priv, unsigned int intel_compute_tile_offset(int *x, int *y, const struct drm_framebuffer *fb, int plane, - unsigned int pitch, unsigned int rotation) { const struct drm_i915_private *dev_priv = to_i915(fb->dev); unsigned int alignment = intel_surf_alignment(dev_priv, fb->modifier[plane]); + unsigned int pitch; + + if (intel_rotation_90_or_270(rotation)) + pitch = to_intel_framebuffer(fb)->rotated[plane].pitch; + else + pitch = fb->pitches[plane]; return _intel_compute_tile_offset(dev_priv, x, y, fb, plane, pitch, rotation, alignment ? (alignment - 1) : 0); @@ -2988,8 +2993,7 @@ static void i9xx_update_primary_plane(struct drm_plane *primary, if (INTEL_INFO(dev)->gen >= 4) intel_crtc->dspaddr_offset = - intel_compute_tile_offset(&x, &y, fb, 0, - fb->pitches[0], rotation); + intel_compute_tile_offset(&x, &y, fb, 0, rotation); if (rotation == BIT(DRM_ROTATE_180)) { dspcntr |= DISPPLANE_ROTATE_180; @@ -3091,8 +3095,7 @@ static void ironlake_update_primary_plane(struct drm_plane *primary, intel_add_fb_offsets(&x, &y, fb, 0, rotation); intel_crtc->dspaddr_offset = - intel_compute_tile_offset(&x, &y, fb, 0, - fb->pitches[0], rotation); + intel_compute_tile_offset(&x, &y, fb, 0, rotation); if (rotation == BIT(DRM_ROTATE_180)) { dspcntr |= DISPPLANE_ROTATE_180; @@ -3263,7 +3266,7 @@ static void skylake_update_primary_plane(struct drm_plane *plane, struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->base.crtc); struct drm_framebuffer *fb = plane_state->base.fb; int pipe = intel_crtc->pipe; - u32 plane_ctl, stride_div, stride; + u32 plane_ctl, stride; unsigned int rotation = plane_state->base.rotation; u32 surf_addr; int scaler_id = plane_state->scaler_id; @@ -3303,17 +3306,16 @@ static void skylake_update_primary_plane(struct drm_plane *plane, src_w = drm_rect_width(&r); src_h = drm_rect_height(&r); - stride_div = intel_tile_height(dev_priv, fb->modifier[0], cpp); - stride = intel_fb->rotated[0].pitch; + stride = intel_fb->rotated[0].pitch / + intel_tile_height(dev_priv, fb->modifier[0], cpp); } else { - stride_div = intel_fb_stride_alignment(dev_priv, fb->modifier[0], - fb->pixel_format); - stride = fb->pitches[0]; + stride = fb->pitches[0] / + intel_fb_stride_alignment(dev_priv, fb->modifier[0], + fb->pixel_format); } intel_add_fb_offsets(&src_x, &src_y, fb, 0, rotation); - surf_addr = intel_compute_tile_offset(&src_x, &src_y, fb, 0, - stride, rotation); + surf_addr = intel_compute_tile_offset(&src_x, &src_y, fb, 0, rotation); /* Sizes are 0 based */ src_w--; @@ -3326,7 +3328,7 @@ static void skylake_update_primary_plane(struct drm_plane *plane, I915_WRITE(PLANE_CTL(pipe, 0), plane_ctl); I915_WRITE(PLANE_OFFSET(pipe, 0), (src_y << 16) | src_x); - I915_WRITE(PLANE_STRIDE(pipe, 0), stride / stride_div); + I915_WRITE(PLANE_STRIDE(pipe, 0), stride); I915_WRITE(PLANE_SIZE(pipe, 0), (src_h << 16) | src_w); if (scaler_id >= 0) { diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index 473b4cf9a2ff..e3de1fc3b04d 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h @@ -1190,7 +1190,6 @@ void assert_pipe(struct drm_i915_private *dev_priv, enum pipe pipe, bool state); #define assert_pipe_disabled(d, p) assert_pipe(d, p, false) u32 intel_compute_tile_offset(int *x, int *y, const struct drm_framebuffer *fb, int plane, - unsigned int pitch, unsigned int rotation); void intel_prepare_reset(struct drm_device *dev); void intel_finish_reset(struct drm_device *dev); diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c index 86176304155d..31be24f27207 100644 --- a/drivers/gpu/drm/i915/intel_sprite.c +++ b/drivers/gpu/drm/i915/intel_sprite.c @@ -189,7 +189,7 @@ skl_update_plane(struct drm_plane *drm_plane, struct intel_framebuffer *intel_fb = to_intel_framebuffer(fb); const int pipe = intel_plane->pipe; const int plane = intel_plane->plane + 1; - u32 plane_ctl, stride_div, stride; + u32 plane_ctl, stride; const struct drm_intel_sprite_colorkey *key = &plane_state->ckey; u32 surf_addr; unsigned int rotation = plane_state->base.rotation; @@ -241,17 +241,16 @@ skl_update_plane(struct drm_plane *drm_plane, src_w = drm_rect_width(&r); src_h = drm_rect_height(&r); - stride_div = intel_tile_height(dev_priv, fb->modifier[0], cpp); - stride = intel_fb->rotated[0].pitch; + stride = intel_fb->rotated[0].pitch / + intel_tile_height(dev_priv, fb->modifier[0], cpp); } else { - stride_div = intel_fb_stride_alignment(dev_priv, fb->modifier[0], - fb->pixel_format); - stride = fb->pitches[0]; + stride = fb->pitches[0] / + intel_fb_stride_alignment(dev_priv, fb->modifier[0], + fb->pixel_format); } intel_add_fb_offsets(&x, &y, fb, 0, rotation); - surf_addr = intel_compute_tile_offset(&x, &y, fb, 0, - stride, rotation); + surf_addr = intel_compute_tile_offset(&x, &y, fb, 0, rotation); /* Sizes are 0 based */ src_w--; @@ -260,7 +259,7 @@ skl_update_plane(struct drm_plane *drm_plane, crtc_h--; I915_WRITE(PLANE_OFFSET(pipe, plane), (y << 16) | x); - I915_WRITE(PLANE_STRIDE(pipe, plane), stride / stride_div); + I915_WRITE(PLANE_STRIDE(pipe, plane), stride); I915_WRITE(PLANE_SIZE(pipe, plane), (src_h << 16) | src_w); /* program plane scaler */ @@ -428,8 +427,7 @@ vlv_update_plane(struct drm_plane *dplane, crtc_h--; intel_add_fb_offsets(&x, &y, fb, 0, rotation); - sprsurf_offset = intel_compute_tile_offset(&x, &y, fb, 0, - fb->pitches[0], rotation); + sprsurf_offset = intel_compute_tile_offset(&x, &y, fb, 0, rotation); if (rotation == BIT(DRM_ROTATE_180)) { sprctl |= SP_ROTATE_180; @@ -560,8 +558,7 @@ ivb_update_plane(struct drm_plane *plane, sprscale = SPRITE_SCALE_ENABLE | (src_w << 16) | src_h; intel_add_fb_offsets(&x, &y, fb, 0, rotation); - sprsurf_offset = intel_compute_tile_offset(&x, &y, fb, 0, - fb->pitches[0], rotation); + sprsurf_offset = intel_compute_tile_offset(&x, &y, fb, 0, rotation); if (rotation == BIT(DRM_ROTATE_180)) { sprctl |= SPRITE_ROTATE_180; @@ -696,8 +693,7 @@ ilk_update_plane(struct drm_plane *plane, dvsscale = DVS_SCALE_ENABLE | (src_w << 16) | src_h; intel_add_fb_offsets(&x, &y, fb, 0, rotation); - dvssurf_offset = intel_compute_tile_offset(&x, &y, fb, 0, - fb->pitches[0], rotation); + dvssurf_offset = intel_compute_tile_offset(&x, &y, fb, 0, rotation); if (rotation == BIT(DRM_ROTATE_180)) { dvscntr |= DVS_ROTATE_180;