From patchwork Thu Jan 21 02:26:22 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: tom.orourke@intel.com X-Patchwork-Id: 8076941 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 17FF99F1C0 for ; Thu, 21 Jan 2016 02:27:59 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 3D336205E7 for ; Thu, 21 Jan 2016 02:27:58 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 52E10205EA for ; Thu, 21 Jan 2016 02:27:57 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 8DDBB7210A; Wed, 20 Jan 2016 18:27:56 -0800 (PST) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by gabe.freedesktop.org (Postfix) with ESMTP id 51FF072108 for ; Wed, 20 Jan 2016 18:27:35 -0800 (PST) Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orsmga101.jf.intel.com with ESMTP; 20 Jan 2016 18:27:35 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.22,323,1449561600"; d="scan'208";a="897780536" Received: from torourke-desk.ra.intel.com (HELO localhost.localdomain) ([10.10.35.157]) by fmsmga002.fm.intel.com with ESMTP; 20 Jan 2016 18:27:34 -0800 From: tom.orourke@intel.com To: intel-gfx@lists.freedesktop.org Date: Wed, 20 Jan 2016 18:26:22 -0800 Message-Id: <1453343184-160456-21-git-send-email-tom.orourke@intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1453343184-160456-1-git-send-email-tom.orourke@intel.com> References: <1453343184-160456-1-git-send-email-tom.orourke@intel.com> Cc: Tom O'Rourke Subject: [Intel-gfx] [RFC 20/22] drm/i915/slpc: Add slpc support for max/min freq X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Tom O'Rourke Update sysfs and debugfs functions to set SLPC parameters when setting max/min frequency. Signed-off-by: Tom O'Rourke --- drivers/gpu/drm/i915/i915_debugfs.c | 6 ++++++ drivers/gpu/drm/i915/i915_sysfs.c | 8 ++++++++ 2 files changed, 14 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c index b705aff..c26260e 100644 --- a/drivers/gpu/drm/i915/i915_debugfs.c +++ b/drivers/gpu/drm/i915/i915_debugfs.c @@ -5118,6 +5118,9 @@ i915_max_freq_set(void *data, u64 val) } dev_priv->rps.max_freq_softlimit = val; + if (HAS_SLPC(dev)) + intel_slpc_set_param(dev, SLPC_PARAM_GLOBAL_MAX_GT_FREQ_MHZ, + (u32) intel_gpu_freq(dev_priv, val)); intel_set_rps(dev, val); @@ -5185,6 +5188,9 @@ i915_min_freq_set(void *data, u64 val) } dev_priv->rps.min_freq_softlimit = val; + if (HAS_SLPC(dev)) + intel_slpc_set_param(dev, SLPC_PARAM_GLOBAL_MIN_GT_FREQ_MHZ, + (u32) intel_gpu_freq(dev_priv, val)); intel_set_rps(dev, val); diff --git a/drivers/gpu/drm/i915/i915_sysfs.c b/drivers/gpu/drm/i915/i915_sysfs.c index f69b949..ed72c74 100644 --- a/drivers/gpu/drm/i915/i915_sysfs.c +++ b/drivers/gpu/drm/i915/i915_sysfs.c @@ -389,6 +389,10 @@ static ssize_t gt_max_freq_mhz_store(struct device *kdev, dev_priv->rps.max_freq_softlimit = val; + if (HAS_SLPC(dev)) + intel_slpc_set_param(dev, SLPC_PARAM_GLOBAL_MAX_GT_FREQ_MHZ, + (u32) intel_gpu_freq(dev_priv, val)); + val = clamp_t(int, dev_priv->rps.cur_freq, dev_priv->rps.min_freq_softlimit, dev_priv->rps.max_freq_softlimit); @@ -448,6 +452,10 @@ static ssize_t gt_min_freq_mhz_store(struct device *kdev, dev_priv->rps.min_freq_softlimit = val; + if (HAS_SLPC(dev)) + intel_slpc_set_param(dev, SLPC_PARAM_GLOBAL_MIN_GT_FREQ_MHZ, + (u32) intel_gpu_freq(dev_priv, val)); + val = clamp_t(int, dev_priv->rps.cur_freq, dev_priv->rps.min_freq_softlimit, dev_priv->rps.max_freq_softlimit);