From patchwork Wed Jan 27 16:10:02 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Kumar, Shobhit" X-Patchwork-Id: 8135381 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id BBABE9F1C0 for ; Wed, 27 Jan 2016 16:12:13 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 1D37F20270 for ; Wed, 27 Jan 2016 16:12:09 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 0FA8520376 for ; Wed, 27 Jan 2016 16:12:08 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 9A38C7208A; Wed, 27 Jan 2016 08:12:07 -0800 (PST) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by gabe.freedesktop.org (Postfix) with ESMTP id 0816A72089 for ; Wed, 27 Jan 2016 08:12:04 -0800 (PST) Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orsmga102.jf.intel.com with ESMTP; 27 Jan 2016 08:10:21 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.22,355,1449561600"; d="scan'208";a="902256270" Received: from skumar40-mobl.iind.intel.com ([10.223.179.230]) by fmsmga002.fm.intel.com with ESMTP; 27 Jan 2016 08:10:17 -0800 From: Shobhit Kumar To: intel-gfx@lists.freedesktop.org Date: Wed, 27 Jan 2016 21:40:02 +0530 Message-Id: <1453911003-9856-5-git-send-email-shobhit.kumar@intel.com> X-Mailer: git-send-email 2.5.0 In-Reply-To: <1453911003-9856-1-git-send-email-shobhit.kumar@intel.com> References: <1453911003-9856-1-git-send-email-shobhit.kumar@intel.com> Subject: [Intel-gfx] [v2 5/6] drm/i915: Add support to parse DMI table and get platform memory info X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This is needed for WM computation workaround for arbitrated display bandwidth. v2: Address Matt's review comments - Be more paranoid while dmi decoding - Also add support for decoding speed from configured memory speed if availble in DMI memory entry Cc: matthew.d.roper@intel.com Signed-off-by: Shobhit Kumar --- drivers/gpu/drm/i915/i915_dma.c | 47 +++++++++++++++++++++++++++++++++++++++++ drivers/gpu/drm/i915/i915_drv.h | 6 ++++++ 2 files changed, 53 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c index d70d96f..320143b 100644 --- a/drivers/gpu/drm/i915/i915_dma.c +++ b/drivers/gpu/drm/i915/i915_dma.c @@ -49,6 +49,7 @@ #include #include #include +#include static int i915_getparam(struct drm_device *dev, void *data, @@ -855,6 +856,49 @@ static void intel_init_dpio(struct drm_i915_private *dev_priv) } } +static void dmi_decode_memory_info(const struct dmi_header *hdr, void *priv) +{ + struct drm_i915_private *dev_priv = (struct drm_i915_private *) priv; + const u8 *data = (const u8 *) hdr; + uint16_t size, mem_speed; + +#define DMI_CONF_MEM_SPEED_OFFSET 0x20 +#define DMI_MEM_SPEED_OFFSET 0x15 +#define DMI_MEM_SIZE_OFFSET 0x0C + + if (hdr->type == DMI_ENTRY_MEM_DEVICE) { + /* Found a memory channel ? */ + size = (uint16_t) (*((uint16_t *)(data + DMI_MEM_SIZE_OFFSET))); + if (size == 0) + return; + + dev_priv->dmi.mem_channel++; + + /* Get the speed */ + if (hdr->length > DMI_CONF_MEM_SPEED_OFFSET) + mem_speed = + (uint16_t) (*((uint16_t *)(data + DMI_CONF_MEM_SPEED_OFFSET))); + else if (hdr->length > DMI_MEM_SPEED_OFFSET) + mem_speed = + (uint16_t) (*((uint16_t *)(data + DMI_MEM_SPEED_OFFSET))); + else + mem_speed = -1; + + /* + * Check all channels have same speed + * else mark speed as invalid + */ + if (dev_priv->dmi.mem_speed == 0) { + if (mem_speed > 0) + dev_priv->dmi.mem_speed = mem_speed; + else + dev_priv->dmi.mem_speed = -1; + } else if (dev_priv->dmi.mem_speed > 0 && + dev_priv->dmi.mem_speed != mem_speed) + dev_priv->dmi.mem_speed = -1; + } +} + /** * i915_driver_load - setup chip and create an initial config * @dev: DRM device @@ -882,6 +926,9 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags) dev->dev_private = dev_priv; dev_priv->dev = dev; + /* walk the dmi device table for getting platform memory information */ + dmi_walk(dmi_decode_memory_info, (void *) dev_priv); + /* Setup the write-once "constant" device info */ device_info = (struct intel_device_info *)&dev_priv->info; memcpy(device_info, info, sizeof(dev_priv->info)); diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 211af53..b040e7a 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -1968,6 +1968,12 @@ struct drm_i915_private { * NOTE: This is the dri1/ums dungeon, don't add stuff here. Your patch * will be rejected. Instead look for a better place. */ + + /* DMI data for memory bandwidth calculation */ + struct { + uint16_t mem_channel; + int16_t mem_speed; + } dmi; }; static inline struct drm_i915_private *to_i915(const struct drm_device *dev)