From patchwork Wed Feb 3 18:39:08 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Robert Bragg X-Patchwork-Id: 8206931 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 390899F4DD for ; Wed, 3 Feb 2016 18:39:29 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 051BC20340 for ; Wed, 3 Feb 2016 18:39:28 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 50F94202D1 for ; Wed, 3 Feb 2016 18:39:26 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 056F46E7ED; Wed, 3 Feb 2016 10:39:24 -0800 (PST) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-wm0-f67.google.com (mail-wm0-f67.google.com [74.125.82.67]) by gabe.freedesktop.org (Postfix) with ESMTPS id 65DBE6E7E2; Wed, 3 Feb 2016 10:39:20 -0800 (PST) Received: by mail-wm0-f67.google.com with SMTP id p63so8649318wmp.1; Wed, 03 Feb 2016 10:39:20 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=v7DmJ/1saGFomlwSbVAqeOK822eQLPiher7upIanRX8=; b=jVF5pHwxg7Qkl4XhnyCslwUt1LdRazJaYdlpz3ScYjG/nOeAAEOWjVsGRvwcH0JZoC sAEo1cN9Z0WvFBvlR8WGQuSpcpkt6E/tymaFpUt/nWFj9fGjJsMmS/X1Wq/jTlAGewB9 BUh4wy6M0xdEpU4Rvqq0ayPrGbZemssqaTbpk39Sk4ZRLMA9Wm2P7sB6apCl7a547div rABSF7JocU8b/s/UXXjmOIAFezFhMq5HC4Gv1mD7+dVA4MTibhLkqAYzLUR18BekMKkP 349V7jrgpLoBqd2zt4GLbmSH61dAPFVMmvwEu2JqeVf61MfOntvSrmRZbyR1PZE0MESU FS/Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references; bh=v7DmJ/1saGFomlwSbVAqeOK822eQLPiher7upIanRX8=; b=cu41fKeO7w90GWTZwSOIZlYgkFWGjGLQ+LeUttid+Nr/T2d7BA51lPBrksuXPPDzft P6TYeTRAUrfU3wnRB/HFkI4PEy/38O3dBg0VUafi9siaoiDMLDnK3BIaCb90zrUxVLzn 7l8FUrxttBJTBGfAJcN0ZpGCz3YjCTBxVe5ChgJHJxxxS493ewRdsmbgcDdSQHPLu/TO sPzFEkxBDsdT3PlfLjHL8MGAj6GqYkK+hnwX8OYtA/59GCwwfRM9IKV9UqKgXacU0Ft4 WG+bGdPCzw8dqdq1V2/8grfafdtKYZL9JHpboFigZ2bt3MMDsKaAZ+62fIfClnrQiChq w+Qg== X-Gm-Message-State: AG10YOQETc/VAM/HAkX1CO6vO3//mnWquGG1Gb9YpGjyVAmIBbPvAfErO8M4XQiaym7HQA== X-Received: by 10.28.48.19 with SMTP id w19mr18676742wmw.18.1454524759175; Wed, 03 Feb 2016 10:39:19 -0800 (PST) Received: from sixbynine.org ([83.217.123.106]) by smtp.gmail.com with ESMTPSA id z137sm9159398wmc.8.2016.02.03.10.39.18 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 03 Feb 2016 10:39:18 -0800 (PST) From: Robert Bragg To: intel-gfx@lists.freedesktop.org Date: Wed, 3 Feb 2016 18:39:08 +0000 Message-Id: <1454524753-13218-4-git-send-email-robert@sixbynine.org> X-Mailer: git-send-email 2.7.0 In-Reply-To: <1454524753-13218-1-git-send-email-robert@sixbynine.org> References: <1454524753-13218-1-git-send-email-robert@sixbynine.org> Cc: David Airlie , dri-devel@lists.freedesktop.org, Sourab Gupta , Daniel Vetter Subject: [Intel-gfx] [PATCH 3/8] drm/i915: Add 'render basic' Haswell OA unit config X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-4.5 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,RP_MATCHES_RCVD,T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Adds a static OA unit, MUX + B Counter configuration for basic render metrics on Haswell. This is autogenerated from an internal XML description of metric sets. Signed-off-by: Robert Bragg --- drivers/gpu/drm/i915/Makefile | 3 +- drivers/gpu/drm/i915/i915_drv.h | 14 ++++ drivers/gpu/drm/i915/i915_oa_hsw.c | 132 +++++++++++++++++++++++++++++++++++++ drivers/gpu/drm/i915/i915_oa_hsw.h | 34 ++++++++++ 4 files changed, 182 insertions(+), 1 deletion(-) create mode 100644 drivers/gpu/drm/i915/i915_oa_hsw.c create mode 100644 drivers/gpu/drm/i915/i915_oa_hsw.h diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile index af8ecbb..a0131da 100644 --- a/drivers/gpu/drm/i915/Makefile +++ b/drivers/gpu/drm/i915/Makefile @@ -95,7 +95,8 @@ i915-y += dvo_ch7017.o \ i915-y += i915_vgpu.o # perf code -i915-y += i915_perf.o +i915-y += i915_perf.o \ + i915_oa_hsw.o # legacy horrors i915-y += i915_dma.o diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 7748383..86da0ae 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -1732,6 +1732,11 @@ struct intel_wm_config { bool sprites_scaled; }; +struct i915_oa_reg { + u32 addr; + u32 value; +}; + struct i915_perf_read_state { int count; ssize_t read; @@ -2062,6 +2067,15 @@ struct drm_i915_private { bool initialized; struct mutex lock; struct list_head streams; + + struct { + u32 metrics_set; + + const struct i915_oa_reg *mux_regs; + int mux_regs_len; + const struct i915_oa_reg *b_counter_regs; + int b_counter_regs_len; + } oa; } perf; /* Abstract the submission mechanism (legacy ringbuffer or execlists) away */ diff --git a/drivers/gpu/drm/i915/i915_oa_hsw.c b/drivers/gpu/drm/i915/i915_oa_hsw.c new file mode 100644 index 0000000..c05745e --- /dev/null +++ b/drivers/gpu/drm/i915/i915_oa_hsw.c @@ -0,0 +1,132 @@ +/* + * Autogenerated file, DO NOT EDIT manually! + * + * Copyright (c) 2015 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + */ + +#include "i915_drv.h" + +enum metric_set_id { + METRIC_SET_ID_RENDER_BASIC = 1, +}; + +int i915_oa_n_builtin_metric_sets_hsw = 1; + +static const struct i915_oa_reg b_counter_config_render_basic[] = { + { 0x2724, 0x00800000 }, + { 0x2720, 0x00000000 }, + { 0x2714, 0x00800000 }, + { 0x2710, 0x00000000 }, +}; + +static const struct i915_oa_reg mux_config_render_basic[] = { + { 0x253A4, 0x01600000 }, + { 0x25440, 0x00100000 }, + { 0x25128, 0x00000000 }, + { 0x2691C, 0x00000800 }, + { 0x26AA0, 0x01500000 }, + { 0x26B9C, 0x00006000 }, + { 0x2791C, 0x00000800 }, + { 0x27AA0, 0x01500000 }, + { 0x27B9C, 0x00006000 }, + { 0x2641C, 0x00000400 }, + { 0x25380, 0x00000010 }, + { 0x2538C, 0x00000000 }, + { 0x25384, 0x0800AAAA }, + { 0x25400, 0x00000004 }, + { 0x2540C, 0x06029000 }, + { 0x25410, 0x00000002 }, + { 0x25404, 0x5C30FFFF }, + { 0x25100, 0x00000016 }, + { 0x25110, 0x00000400 }, + { 0x25104, 0x00000000 }, + { 0x26804, 0x00001211 }, + { 0x26884, 0x00000100 }, + { 0x26900, 0x00000002 }, + { 0x26908, 0x00700000 }, + { 0x26904, 0x00000000 }, + { 0x26984, 0x00001022 }, + { 0x26A04, 0x00000011 }, + { 0x26A80, 0x00000006 }, + { 0x26A88, 0x00000C02 }, + { 0x26A84, 0x00000000 }, + { 0x26B04, 0x00001000 }, + { 0x26B80, 0x00000002 }, + { 0x26B8C, 0x00000007 }, + { 0x26B84, 0x00000000 }, + { 0x27804, 0x00004844 }, + { 0x27884, 0x00000400 }, + { 0x27900, 0x00000002 }, + { 0x27908, 0x0E000000 }, + { 0x27904, 0x00000000 }, + { 0x27984, 0x00004088 }, + { 0x27A04, 0x00000044 }, + { 0x27A80, 0x00000006 }, + { 0x27A88, 0x00018040 }, + { 0x27A84, 0x00000000 }, + { 0x27B04, 0x00004000 }, + { 0x27B80, 0x00000002 }, + { 0x27B8C, 0x000000E0 }, + { 0x27B84, 0x00000000 }, + { 0x26104, 0x00002222 }, + { 0x26184, 0x0C006666 }, + { 0x26284, 0x04000000 }, + { 0x26304, 0x04000000 }, + { 0x26400, 0x00000002 }, + { 0x26410, 0x000000A0 }, + { 0x26404, 0x00000000 }, + { 0x25420, 0x04108020 }, + { 0x25424, 0x1284A420 }, + { 0x2541C, 0x00000000 }, + { 0x25428, 0x00042049 }, +}; + +static int select_render_basic_config(struct drm_i915_private *dev_priv) +{ + dev_priv->perf.oa.mux_regs = + mux_config_render_basic; + dev_priv->perf.oa.mux_regs_len = + ARRAY_SIZE(mux_config_render_basic); + + dev_priv->perf.oa.b_counter_regs = + b_counter_config_render_basic; + dev_priv->perf.oa.b_counter_regs_len = + ARRAY_SIZE(b_counter_config_render_basic); + + return 0; +} + +int i915_oa_select_metric_set_hsw(struct drm_i915_private *dev_priv) +{ + dev_priv->perf.oa.mux_regs = NULL; + dev_priv->perf.oa.mux_regs_len = 0; + dev_priv->perf.oa.b_counter_regs = NULL; + dev_priv->perf.oa.b_counter_regs_len = 0; + + switch (dev_priv->perf.oa.metrics_set) { + case METRIC_SET_ID_RENDER_BASIC: + return select_render_basic_config(dev_priv); + default: + return -ENODEV; + } +} diff --git a/drivers/gpu/drm/i915/i915_oa_hsw.h b/drivers/gpu/drm/i915/i915_oa_hsw.h new file mode 100644 index 0000000..b618a1f --- /dev/null +++ b/drivers/gpu/drm/i915/i915_oa_hsw.h @@ -0,0 +1,34 @@ +/* + * Autogenerated file, DO NOT EDIT manually! + * + * Copyright (c) 2015 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + */ + +#ifndef __I915_OA_HSW_H__ +#define __I915_OA_HSW_H__ + +extern int i915_oa_n_builtin_metric_sets_hsw; + +extern int i915_oa_select_metric_set_hsw(struct drm_i915_private *dev_priv); + +#endif