From patchwork Tue Feb 16 11:47:48 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chris Wilson X-Patchwork-Id: 8324321 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 7F1B7C02AA for ; Tue, 16 Feb 2016 11:48:10 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id A671F20295 for ; Tue, 16 Feb 2016 11:48:09 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id BA0352027D for ; Tue, 16 Feb 2016 11:48:08 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 55CEA6E7A9; Tue, 16 Feb 2016 11:48:08 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-wm0-f67.google.com (mail-wm0-f67.google.com [74.125.82.67]) by gabe.freedesktop.org (Postfix) with ESMTPS id 6DEDF6E7A8 for ; Tue, 16 Feb 2016 11:48:07 +0000 (UTC) Received: by mail-wm0-f67.google.com with SMTP id g62so20310566wme.2 for ; Tue, 16 Feb 2016 03:48:07 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=CYB1oc9XtfA8tGqPXwhAhKHd8nHBBYBVvZDcyscqyIg=; b=S2RH258vHQG9+fIkppW/5Zk8BKx5+DT5JN2Z4Aor0nh0VzJ0sjFoCU/zDWF0cCervg kUKECgjnRjpNRmK0ZfsnvM2jatuPb46BJDa2xGUsN/iuGPpVKB/TUUR7Fnzz93vl7DKV QXjmKtFGT9JMHfIGHvyyIIYHpOY8/3EWLRYofkVrbjalCpyUvYGf+6ewgaYe87IPLnRj bqDLkzLVbTmJPaHUxsk9Qjr5FWv6XcSzc4frSmQPt6ZtMg1KT7lRfgKTOm4DdEsCxiP/ yc9lR8zzb86v59cuy8VpLOG9uGvPOGrD1eFvxpO+DqwH5ut3TSABewAF+ArRDT5CYm2Z GOcw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references; bh=CYB1oc9XtfA8tGqPXwhAhKHd8nHBBYBVvZDcyscqyIg=; b=V8+GAst+8jEUd4OHIDn+bgu/4U9xys6DN5kerjV4CuVIS/7a1X65+Q3w0p6i88xMTj hzEEt8lTNhROYhTv9tIo9nJNb2rtBtPpWE0dHook63uQUQ0QSe55BmppsAodkL31iUrK XOLQk97v3WaIa1ACf+kMjbwqIfvDX70lnBzJfT0nQfDH4BSecxF4VcFwhs8chNljT6ZZ F+qRkdtTfa8KNTAC428hoB5vUkR2SPjVLddOZbYh1xp1FomCSV64XaIya0gDPuXKLE1a 8LMqPijzYHIzh8DquwXAe/yeJGWCNH+46WDC7DHPEpxDCi7x3LGAC/kG+rfqePzvBg6e PfSg== X-Gm-Message-State: AG10YOSE+GYuZ46lP4qmQCeLTyhWTh3JRqMYRhiSWyUDhGqP4sqMA1/MMw8bDZ5mZxmKgg== X-Received: by 10.28.57.131 with SMTP id g125mr17515015wma.17.1455623286256; Tue, 16 Feb 2016 03:48:06 -0800 (PST) Received: from haswell.alporthouse.com ([78.156.65.138]) by smtp.gmail.com with ESMTPSA id qs1sm29907863wjc.2.2016.02.16.03.48.04 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 16 Feb 2016 03:48:05 -0800 (PST) From: Chris Wilson To: intel-gfx@lists.freedesktop.org Date: Tue, 16 Feb 2016 11:47:48 +0000 Message-Id: <1455623268-10023-6-git-send-email-chris@chris-wilson.co.uk> X-Mailer: git-send-email 2.7.0 In-Reply-To: <1455623268-10023-1-git-send-email-chris@chris-wilson.co.uk> References: <1455623268-10023-1-git-send-email-chris@chris-wilson.co.uk> Cc: Daniel Vetter , Mika Kuoppala Subject: [Intel-gfx] [PATCH 5/5] drm/i915: Replace manual barrier() with READ_ONCE() in HWS accessor X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-4.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,RP_MATCHES_RCVD,T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP When reading from the HWS page, we use barrier() to prevent the compiler optimising away the read from the volatile (may be updated by the GPU) memory address. This is more suited to READ_ONCE(); make it so. Signed-off-by: Chris Wilson Cc: Daniel Vetter Cc: Mika Kuoppala Reviewed-by: Mika Kuoppala --- drivers/gpu/drm/i915/intel_ringbuffer.h | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h index e2b2dc2c2f49..231663a76387 100644 --- a/drivers/gpu/drm/i915/intel_ringbuffer.h +++ b/drivers/gpu/drm/i915/intel_ringbuffer.h @@ -403,8 +403,7 @@ intel_read_status_page(struct intel_engine_cs *ring, int reg) { /* Ensure that the compiler doesn't optimize away the load. */ - barrier(); - return ring->status_page.page_addr[reg]; + return READ_ONCE(ring->status_page.page_addr[reg]); } static inline void