| Message ID | 1455715086-25682-1-git-send-email-jani.nikula@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Wed, 17 Feb 2016, Jani Nikula <jani.nikula@intel.com> wrote: > From: Shashank Sharma <shashank.sharma@intel.com> > > This patch contains following changes: > 1. Add BXT MIPI display address base. > 2. Call dsi_init from display_setup function. > > v2: Rebased on latest nightly branch > > v3 by Jani: init dsi after ddi > > Signed-off-by: Shashank Sharma <shashank.sharma@intel.com> > Signed-off-by: Uma Shankar <uma.shankar@intel.com> > Signed-off-by: Jani Nikula <jani.nikula@intel.com> The reason this is not pushed is that we should get DSI working *before* enabling it. If we push this now, loading the driver may block booting due to incomplete DSI support. That's not acceptable, as it may block other people doing something completely different on hardware with BXT DSI. BR, Jani. > --- > drivers/gpu/drm/i915/i915_reg.h | 1 + > drivers/gpu/drm/i915/intel_display.c | 2 ++ > drivers/gpu/drm/i915/intel_dsi.c | 2 ++ > 3 files changed, 5 insertions(+) > > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h > index 3774870477c1..17b3b7915c70 100644 > --- a/drivers/gpu/drm/i915/i915_reg.h > +++ b/drivers/gpu/drm/i915/i915_reg.h > @@ -1795,6 +1795,7 @@ enum skl_disp_power_wells { > > #define VLV_DISPLAY_BASE 0x180000 > #define VLV_MIPI_BASE VLV_DISPLAY_BASE > +#define BXT_MIPI_BASE 0x60000 > > #define VLV_GU_CTL0 _MMIO(VLV_DISPLAY_BASE + 0x2030) > #define VLV_GU_CTL1 _MMIO(VLV_DISPLAY_BASE + 0x2034) > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c > index aedddaabc06b..63090e7cd489 100644 > --- a/drivers/gpu/drm/i915/intel_display.c > +++ b/drivers/gpu/drm/i915/intel_display.c > @@ -14411,6 +14411,8 @@ static void intel_setup_outputs(struct drm_device *dev) > intel_ddi_init(dev, PORT_A); > intel_ddi_init(dev, PORT_B); > intel_ddi_init(dev, PORT_C); > + > + intel_dsi_init(dev); > } else if (HAS_DDI(dev)) { > int found; > > diff --git a/drivers/gpu/drm/i915/intel_dsi.c b/drivers/gpu/drm/i915/intel_dsi.c > index 378f879f4015..c28826a77f71 100644 > --- a/drivers/gpu/drm/i915/intel_dsi.c > +++ b/drivers/gpu/drm/i915/intel_dsi.c > @@ -1117,6 +1117,8 @@ void intel_dsi_init(struct drm_device *dev) > > if (IS_VALLEYVIEW(dev) || IS_CHERRYVIEW(dev)) { > dev_priv->mipi_mmio_base = VLV_MIPI_BASE; > + } else if (IS_BROXTON(dev)) { > + dev_priv->mipi_mmio_base = BXT_MIPI_BASE; > } else { > DRM_ERROR("Unsupported Mipi device to reg base"); > return;
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 3774870477c1..17b3b7915c70 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -1795,6 +1795,7 @@ enum skl_disp_power_wells { #define VLV_DISPLAY_BASE 0x180000 #define VLV_MIPI_BASE VLV_DISPLAY_BASE +#define BXT_MIPI_BASE 0x60000 #define VLV_GU_CTL0 _MMIO(VLV_DISPLAY_BASE + 0x2030) #define VLV_GU_CTL1 _MMIO(VLV_DISPLAY_BASE + 0x2034) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index aedddaabc06b..63090e7cd489 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -14411,6 +14411,8 @@ static void intel_setup_outputs(struct drm_device *dev) intel_ddi_init(dev, PORT_A); intel_ddi_init(dev, PORT_B); intel_ddi_init(dev, PORT_C); + + intel_dsi_init(dev); } else if (HAS_DDI(dev)) { int found; diff --git a/drivers/gpu/drm/i915/intel_dsi.c b/drivers/gpu/drm/i915/intel_dsi.c index 378f879f4015..c28826a77f71 100644 --- a/drivers/gpu/drm/i915/intel_dsi.c +++ b/drivers/gpu/drm/i915/intel_dsi.c @@ -1117,6 +1117,8 @@ void intel_dsi_init(struct drm_device *dev) if (IS_VALLEYVIEW(dev) || IS_CHERRYVIEW(dev)) { dev_priv->mipi_mmio_base = VLV_MIPI_BASE; + } else if (IS_BROXTON(dev)) { + dev_priv->mipi_mmio_base = BXT_MIPI_BASE; } else { DRM_ERROR("Unsupported Mipi device to reg base"); return;