From patchwork Thu Feb 18 11:42:16 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Wang, Zhi A" X-Patchwork-Id: 8349141 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 13C109F399 for ; Thu, 18 Feb 2016 11:45:19 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 4A0F32022D for ; Thu, 18 Feb 2016 11:45:18 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 6A2152022A for ; Thu, 18 Feb 2016 11:45:17 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 8B79D6EB72; Thu, 18 Feb 2016 11:45:16 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by gabe.freedesktop.org (Postfix) with ESMTP id 0FF986EB6F for ; Thu, 18 Feb 2016 11:45:11 +0000 (UTC) Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by orsmga101.jf.intel.com with ESMTP; 18 Feb 2016 03:45:10 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.22,465,1449561600"; d="scan'208";a="654959959" Received: from dev-inno.bj.intel.com ([10.238.135.69]) by FMSMGA003.fm.intel.com with ESMTP; 18 Feb 2016 03:45:09 -0800 From: Zhi Wang To: intel-gfx@lists.freedesktop.org, igvt-g@lists.01.org Date: Thu, 18 Feb 2016 19:42:16 +0800 Message-Id: <1455795741-3487-10-git-send-email-zhi.a.wang@intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1455795741-3487-1-git-send-email-zhi.a.wang@intel.com> References: <1455795741-3487-1-git-send-email-zhi.a.wang@intel.com> Cc: daniel.vetter@ffwll.ch, david.j.cowperthwaite@intel.com, zhiyuan.lv@intel.com Subject: [Intel-gfx] [RFCv2 09/14] drm/i915: generate address mode bit from PPGTT instance X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP After the per-PPGTT address mode gets support, the LRC submission should generate the address mode bit from PPGTT instance, instead of the hard-coded system configuration. Signed-off-by: Zhi Wang --- drivers/gpu/drm/i915/intel_lrc.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c index 62158af..01ea99c2 100644 --- a/drivers/gpu/drm/i915/intel_lrc.c +++ b/drivers/gpu/drm/i915/intel_lrc.c @@ -213,7 +213,7 @@ enum { LEGACY_64B_CONTEXT }; #define GEN8_CTX_ADDRESSING_MODE_SHIFT 3 -#define GEN8_CTX_ADDRESSING_MODE(dev) (USES_FULL_48BIT_PPGTT(dev) ?\ +#define GEN8_CTX_ADDRESSING_MODE(ppgtt) (IS_48BIT_PPGTT(ppgtt) ? \ LEGACY_64B_CONTEXT :\ LEGACY_32B_CONTEXT) enum { @@ -274,8 +274,6 @@ logical_ring_init_platform_invariants(struct intel_engine_cs *ring) (ring->id == VCS || ring->id == VCS2); ring->ctx_desc_template = GEN8_CTX_VALID; - ring->ctx_desc_template |= GEN8_CTX_ADDRESSING_MODE(dev) << - GEN8_CTX_ADDRESSING_MODE_SHIFT; if (IS_GEN8(dev)) ring->ctx_desc_template |= GEN8_CTX_L3LLC_COHERENT; ring->ctx_desc_template |= GEN8_CTX_PRIVILEGE; @@ -318,6 +316,8 @@ intel_lr_context_descriptor_update(struct intel_context *ctx, LRC_PPHWSP_PN * PAGE_SIZE; desc = ring->ctx_desc_template; /* bits 0-11 */ + desc |= GEN8_CTX_ADDRESSING_MODE(ctx->ppgtt) << /* bits 3-4 */ + GEN8_CTX_ADDRESSING_MODE_SHIFT; desc |= lrca; /* bits 12-31 */ desc |= (lrca >> PAGE_SHIFT) << GEN8_CTX_ID_SHIFT; /* bits 32-51 */