From patchwork Wed Mar 9 00:34:14 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: tom.orourke@intel.com X-Patchwork-Id: 8539011 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 5E1DCC0553 for ; Wed, 9 Mar 2016 00:35:38 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 80E92201FE for ; Wed, 9 Mar 2016 00:35:37 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 8E20A2013A for ; Wed, 9 Mar 2016 00:35:36 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 57D5A6E796; Wed, 9 Mar 2016 00:35:35 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by gabe.freedesktop.org (Postfix) with ESMTP id 1A0D46E7AF for ; Wed, 9 Mar 2016 00:35:07 +0000 (UTC) Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga103.fm.intel.com with ESMTP; 08 Mar 2016 16:35:05 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.22,559,1449561600"; d="scan'208";a="932628634" Received: from torourke-desk.ra.intel.com (HELO localhost.localdomain) ([10.10.35.157]) by fmsmga002.fm.intel.com with ESMTP; 08 Mar 2016 16:35:05 -0800 From: tom.orourke@intel.com To: intel-gfx@lists.freedesktop.org Date: Tue, 8 Mar 2016 16:34:14 -0800 Message-Id: <1457483669-155235-12-git-send-email-tom.orourke@intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1457483669-155235-1-git-send-email-tom.orourke@intel.com> References: <1457483669-155235-1-git-send-email-tom.orourke@intel.com> Cc: paulo.r.zanoni@intel.com, Tom O'Rourke Subject: [Intel-gfx] [PATCH 11/26] drm/i915/slpc: Send reset event X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Tom O'Rourke Add host2guc SLPC reset event and send reset event during enable. v2: extract host2guc_slpc to handle slpc status code coding style changes (Paulo) Signed-off-by: Tom O'Rourke --- drivers/gpu/drm/i915/intel_slpc.c | 33 ++++++++++++++++++++++++++++++++- drivers/gpu/drm/i915/intel_slpc.h | 14 ++++++++++++++ 2 files changed, 46 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/intel_slpc.c b/drivers/gpu/drm/i915/intel_slpc.c index 3f9f56c..c8a5cde 100644 --- a/drivers/gpu/drm/i915/intel_slpc.c +++ b/drivers/gpu/drm/i915/intel_slpc.c @@ -26,6 +26,36 @@ #include "i915_drv.h" #include "intel_guc.h" +static void host2guc_slpc(struct drm_i915_private *dev_priv, u32 *data, u32 len) +{ + int ret = host2guc_action(&dev_priv->guc, data, len); + + if (!ret) { + ret = I915_READ(SOFT_SCRATCH(1)); + ret &= SLPC_EVENT_STATUS_MASK; + } + + if (ret) + DRM_ERROR("event 0x%x status %d\n", (data[1] >> 8), ret); +} + +static void host2guc_slpc_reset(struct drm_device *dev) +{ + struct drm_i915_private *dev_priv = dev->dev_private; + struct drm_i915_gem_object *obj = dev_priv->guc.slpc.shared_data_obj; + u32 data[4]; + u64 shared_data_gtt_offset = i915_gem_obj_ggtt_offset(obj); + + data[0] = HOST2GUC_ACTION_SLPC_REQUEST; + data[1] = SLPC_EVENT(SLPC_EVENT_RESET, 2); + data[2] = lower_32_bits(shared_data_gtt_offset); + data[3] = upper_32_bits(shared_data_gtt_offset); + + WARN_ON(data[3] != 0); + + host2guc_slpc(dev_priv, data, 4); +} + static u8 slpc_get_platform_sku(struct drm_i915_gem_object *obj) { struct drm_device *dev = obj->base.dev; @@ -132,7 +162,8 @@ void intel_slpc_disable(struct drm_device *dev) void intel_slpc_enable(struct drm_device *dev) { - return; + if (intel_slpc_active(dev)) + host2guc_slpc_reset(dev); } void intel_slpc_reset(struct drm_device *dev) diff --git a/drivers/gpu/drm/i915/intel_slpc.h b/drivers/gpu/drm/i915/intel_slpc.h index 94cd2f4..7f33a04 100644 --- a/drivers/gpu/drm/i915/intel_slpc.h +++ b/drivers/gpu/drm/i915/intel_slpc.h @@ -28,6 +28,20 @@ #define SLPC_MINOR_VER 4 #define SLPC_VERSION ((2015 << 16) | (SLPC_MAJOR_VER << 8) | (SLPC_MINOR_VER)) +enum slpc_event_id { + SLPC_EVENT_RESET = 0, + SLPC_EVENT_SHUTDOWN = 1, + SLPC_EVENT_PLATFORM_INFO_CHANGE = 2, + SLPC_EVENT_DISPLAY_MODE_CHANGE = 3, + SLPC_EVENT_FLIP_COMPLETE = 4, + SLPC_EVENT_QUERY_TASK_STATE = 5, + SLPC_EVENT_PARAMETER_SET = 6, + SLPC_EVENT_PARAMETER_UNSET = 7, +}; + +#define SLPC_EVENT(id, argc) ((u32) (id) << 8 | (argc)) +#define SLPC_EVENT_STATUS_MASK 0xFF + enum slpc_global_state { SLPC_GLOBAL_STATE_NOT_RUNNING = 0, SLPC_GLOBAL_STATE_INITIALIZING = 1,