| Message ID | 1457543247-13987-2-git-send-email-ville.syrjala@linux.intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
Acked-by: Rodrigo Vivi <rodrigo.vivi@intel.com> I confirm this is hitting BAT hard on CHV. I'm working here to handle this PSR exit on VBlanks on CHV already, but the vblanks spinlocks are giving me headaches... So better to revert. thanks for the finding, ideas and this revert... On Wed, 2016-03-09 at 19:07 +0200, ville.syrjala@linux.intel.com wrote: > From: Ville Syrjälä <ville.syrjala@linux.intel.com> > > This reverts commit a38c274faad0ec6aba692e294ec751d04dbba803. > > PSR causes all sorts of vblank wait timeouts and whanot on CHV. > Disable > it again. > > Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> > Fixes: a38c274faad0 ("drm/i915: Enable PSR by default on Valleyview > and Cherryview.") > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> > --- > drivers/gpu/drm/i915/intel_psr.c | 3 +-- > 1 file changed, 1 insertion(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_psr.c > b/drivers/gpu/drm/i915/intel_psr.c > index b1413beb00d1..38e95185d9c6 100644 > --- a/drivers/gpu/drm/i915/intel_psr.c > +++ b/drivers/gpu/drm/i915/intel_psr.c > @@ -781,8 +781,7 @@ void intel_psr_init(struct drm_device *dev) > > /* Per platform default */ > if (i915.enable_psr == -1) { > - if (IS_HASWELL(dev) || IS_BROADWELL(dev) || > - IS_VALLEYVIEW(dev) || IS_CHERRYVIEW(dev)) > + if (IS_HASWELL(dev) || IS_BROADWELL(dev)) > i915.enable_psr = 1; > else > i915.enable_psr = 0;
Op 09-03-16 om 18:07 schreef ville.syrjala@linux.intel.com: > From: Ville Syrjälä <ville.syrjala@linux.intel.com> > > This reverts commit a38c274faad0ec6aba692e294ec751d04dbba803. > > PSR causes all sorts of vblank wait timeouts and whanot on CHV. Disable > it again. > > Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> > Fixes: a38c274faad0 ("drm/i915: Enable PSR by default on Valleyview and Cherryview.") > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Considering those issues, is there a bugzilla linked to this then so we could track when to enable it again? If this commit has more specifics, or at least some dmesg snippets: Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c index b1413beb00d1..38e95185d9c6 100644 --- a/drivers/gpu/drm/i915/intel_psr.c +++ b/drivers/gpu/drm/i915/intel_psr.c @@ -781,8 +781,7 @@ void intel_psr_init(struct drm_device *dev) /* Per platform default */ if (i915.enable_psr == -1) { - if (IS_HASWELL(dev) || IS_BROADWELL(dev) || - IS_VALLEYVIEW(dev) || IS_CHERRYVIEW(dev)) + if (IS_HASWELL(dev) || IS_BROADWELL(dev)) i915.enable_psr = 1; else i915.enable_psr = 0;