@@ -8886,7 +8886,6 @@ static uint32_t ironlake_compute_dpll(struct intel_crtc *intel_crtc,
static int ironlake_crtc_compute_clock(struct intel_crtc *crtc,
struct intel_crtc_state *crtc_state)
{
- struct drm_device *dev = crtc->base.dev;
intel_clock_t clock, reduced_clock;
u32 dpll = 0, fp = 0, fp2 = 0;
bool has_reduced_clock = false;
@@ -8898,9 +8897,6 @@ static int ironlake_crtc_compute_clock(struct intel_crtc *crtc,
is_lvds = intel_pipe_will_have_type(crtc_state, INTEL_OUTPUT_LVDS);
- WARN(!(HAS_PCH_IBX(dev) || HAS_PCH_CPT(dev)),
- "Unexpected PCH type %d\n", INTEL_PCH_TYPE(dev));
-
if (!crtc_state->clock_set) {
if (!ironlake_compute_clocks(&crtc->base, crtc_state, &clock,
&has_reduced_clock,
The checks were added in commit 5dc5298bb3e5 ("drm/i915: add proper CPU/PCH checks to crtc_mode_set functions") in a time when there was doubts on what PCHs would be supported by HSW. There are similar checks for PCH type in intel_detect_pch() and the function pointers are initialized based on platform/pch information, so the removed WARN can't ever be reached. v2: Rebase without patch that drops lvds downclock code. (Ville) Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com> --- drivers/gpu/drm/i915/intel_display.c | 4 ---- 1 file changed, 4 deletions(-)