From patchwork Tue Mar 15 14:40:03 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Ville Syrjala X-Patchwork-Id: 8588861 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 53228C0553 for ; Tue, 15 Mar 2016 14:42:58 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 739C62024C for ; Tue, 15 Mar 2016 14:42:57 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 40905202AE for ; Tue, 15 Mar 2016 14:42:56 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 358966E76C; Tue, 15 Mar 2016 14:42:50 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTP id 0B6376E75C for ; Tue, 15 Mar 2016 14:41:11 +0000 (UTC) Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by fmsmga101.fm.intel.com with ESMTP; 15 Mar 2016 07:40:45 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.24,339,1455004800"; d="scan'208";a="669966541" Received: from stinkbox.fi.intel.com (HELO stinkbox) ([10.237.72.174]) by FMSMGA003.fm.intel.com with SMTP; 15 Mar 2016 07:40:43 -0700 Received: by stinkbox (sSMTP sendmail emulation); Tue, 15 Mar 2016 16:40:42 +0200 From: ville.syrjala@linux.intel.com To: intel-gfx@lists.freedesktop.org Date: Tue, 15 Mar 2016 16:40:03 +0200 Message-Id: <1458052809-23426-11-git-send-email-ville.syrjala@linux.intel.com> X-Mailer: git-send-email 2.4.10 In-Reply-To: <1458052809-23426-1-git-send-email-ville.syrjala@linux.intel.com> References: <1458052809-23426-1-git-send-email-ville.syrjala@linux.intel.com> MIME-Version: 1.0 Cc: Deepak M Subject: [Intel-gfx] [PATCH 10/16] drm/i915: Power down the DSI PLL before reconfiguring it X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Ville Syrjälä On VLV at least, the BIOS may leave the DSI PLL enabled in some wonky state where it just refuses to lock. Simply disabling the PLL before reconfiguring it is not enough to fix it, but power gating the PLL prior to reconfiguring does work. This happens on BYT FFRD8 when booting with HDMI connected so the DSI display will not be lit up by the BIOS. Also we can remove the code for BXT that disables the PLL before enabling it again. v2: s/vlv/intel/ since BXT made thing generic v3: Remove the BXT disable PLL before enable trick Signed-off-by: Ville Syrjälä Acked-by: Jani Nikula --- drivers/gpu/drm/i915/intel_dsi.c | 6 ++++++ drivers/gpu/drm/i915/intel_dsi_pll.c | 8 -------- 2 files changed, 6 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_dsi.c b/drivers/gpu/drm/i915/intel_dsi.c index 4023b6bffa47..787411e1c36f 100644 --- a/drivers/gpu/drm/i915/intel_dsi.c +++ b/drivers/gpu/drm/i915/intel_dsi.c @@ -482,7 +482,13 @@ static void intel_dsi_pre_enable(struct intel_encoder *encoder) DRM_DEBUG_KMS("\n"); + /* + * The BIOS may leave the PLL in a wonky state where it doesn't + * lock. It needs to be fully powered down to fix it. + */ + intel_disable_dsi_pll(encoder); intel_enable_dsi_pll(encoder); + intel_dsi_prepare(encoder); /* Panel Enable over CRC PMIC */ diff --git a/drivers/gpu/drm/i915/intel_dsi_pll.c b/drivers/gpu/drm/i915/intel_dsi_pll.c index 916cc92c1400..978cc2668a3d 100644 --- a/drivers/gpu/drm/i915/intel_dsi_pll.c +++ b/drivers/gpu/drm/i915/intel_dsi_pll.c @@ -474,14 +474,6 @@ static void bxt_enable_dsi_pll(struct intel_encoder *encoder) DRM_DEBUG_KMS("\n"); - val = I915_READ(BXT_DSI_PLL_ENABLE); - - if (val & BXT_DSI_PLL_DO_ENABLE) { - WARN(1, "DSI PLL already enabled. Disabling it.\n"); - val &= ~BXT_DSI_PLL_DO_ENABLE; - I915_WRITE(BXT_DSI_PLL_ENABLE, val); - } - /* Configure PLL vales */ if (!bxt_configure_dsi_pll(encoder)) { DRM_ERROR("Configure DSI PLL failed, abort PLL enable\n");