diff mbox

[2/2] drm/i915: Do not use INTEL_INFO(dev_priv->dev)

Message ID 1459442979-22102-2-git-send-email-joonas.lahtinen@linux.intel.com (mailing list archive)
State New, archived
Headers show

Commit Message

Joonas Lahtinen March 31, 2016, 4:49 p.m. UTC 
dev_priv is what the macro works hard to extract, pass it directly.

Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
---
 drivers/gpu/drm/i915/i915_gem_gtt.c  | 2 +-
 drivers/gpu/drm/i915/i915_irq.c      | 2 +-
 drivers/gpu/drm/i915/intel_display.c | 2 +-
 drivers/gpu/drm/i915/intel_uncore.c  | 2 +-
 4 files changed, 4 insertions(+), 4 deletions(-)

Comments

Chris Wilson March 31, 2016, 5:12 p.m. UTC | #1 
On Thu, Mar 31, 2016 at 07:49:39PM +0300, Joonas Lahtinen wrote:
> dev_priv is what the macro works hard to extract, pass it directly.

=0 haswell:/usr/src/linux (tasklet)$ git grep -e '[A-Z].*(dev_priv->dev)' -- drivers/gpu/drm/i915/
drivers/gpu/drm/i915/i915_debugfs.c:    if (!HAS_GUC_UCODE(dev_priv->dev))
drivers/gpu/drm/i915/i915_debugfs.c:    if (!HAS_GUC_SCHED(dev_priv->dev))
drivers/gpu/drm/i915/i915_drv.c:        if (!IS_CHERRYVIEW(dev_priv->dev))
drivers/gpu/drm/i915/i915_drv.c:        if (!IS_CHERRYVIEW(dev_priv->dev))
drivers/gpu/drm/i915/i915_gem_gtt.c:    if (INTEL_INFO(dev_priv->dev)->gen < 6) {
drivers/gpu/drm/i915/i915_gem_gtt.c:    if (!USES_PPGTT(dev_priv->dev))
drivers/gpu/drm/i915/i915_gpu_error.c:  if (use_ggtt && src->cache_level != I915_CACHE_NONE && !HAS_LLC(dev_priv->dev))
drivers/gpu/drm/i915/i915_gpu_error.c:  if (HAS_VEBOX(dev_priv->dev)) {
drivers/gpu/drm/i915/i915_irq.c:                if (WARN_ON_ONCE(slice >= NUM_L3_SLICES(dev_priv->dev)))
drivers/gpu/drm/i915/i915_irq.c:        if (HAS_VEBOX(dev_priv->dev)) {
drivers/gpu/drm/i915/intel_audio.c:     if (HAS_PCH_IBX(dev_priv->dev)) {
drivers/gpu/drm/i915/intel_display.c:   if (HAS_DDI(dev_priv->dev)) {
drivers/gpu/drm/i915/intel_display.c:   if (INTEL_INFO(dev_priv->dev)->gen == 5)
drivers/gpu/drm/i915/intel_display.c:   if (HAS_DDI(dev_priv->dev))
drivers/gpu/drm/i915/intel_display.c:   if (HAS_PCH_CPT(dev_priv->dev)) {
drivers/gpu/drm/i915/intel_display.c:   } else if (IS_CHERRYVIEW(dev_priv->dev)) {
drivers/gpu/drm/i915/intel_display.c:   if (HAS_PCH_CPT(dev_priv->dev)) {
drivers/gpu/drm/i915/intel_display.c:   } else if (IS_CHERRYVIEW(dev_priv->dev)) {
drivers/gpu/drm/i915/intel_display.c:   if (HAS_PCH_CPT(dev_priv->dev)) {
drivers/gpu/drm/i915/intel_display.c:   if (HAS_PCH_CPT(dev_priv->dev)) {
drivers/gpu/drm/i915/intel_display.c:   I915_STATE_WARN(HAS_PCH_IBX(dev_priv->dev) && (val & DP_PORT_EN) == 0
drivers/gpu/drm/i915/intel_display.c:   I915_STATE_WARN(HAS_PCH_IBX(dev_priv->dev) && (val & SDVO_ENABLE) == 0
drivers/gpu/drm/i915/intel_display.c:   if (IS_MOBILE(dev_priv->dev))
drivers/gpu/drm/i915/intel_display.c:   if (HAS_PCH_IBX(dev_priv->dev)) {
drivers/gpu/drm/i915/intel_display.c:           if (HAS_PCH_IBX(dev_priv->dev) &&
drivers/gpu/drm/i915/intel_display.c:   BUG_ON(!HAS_PCH_SPLIT(dev_priv->dev));
drivers/gpu/drm/i915/intel_display.c:   if (HAS_PCH_LPT(dev_priv->dev))
drivers/gpu/drm/i915/intel_display.c:   if (HAS_GMCH_DISPLAY(dev_priv->dev))
drivers/gpu/drm/i915/intel_display.c:   if (IS_HASWELL(dev_priv->dev))
drivers/gpu/drm/i915/intel_display.c:           if (HAS_PCH_IBX(dev_priv->dev)) {
drivers/gpu/drm/i915/intel_display.c:   if (HAS_DDI(dev_priv->dev))
drivers/gpu/drm/i915/intel_dpll_mgr.c:  I915_STATE_WARN_ON(!(HAS_PCH_IBX(dev_priv->dev) || HAS_PCH_CPT(dev_priv->dev)));
drivers/gpu/drm/i915/intel_fifo_underrun.c:     if (HAS_PCH_IBX(dev_priv->dev))
drivers/gpu/drm/i915/intel_fifo_underrun.c:     if (HAS_GMCH_DISPLAY(dev_priv->dev) &&
drivers/gpu/drm/i915/intel_hdmi.c:      else if (HAS_PCH_SPLIT(dev_priv->dev))
drivers/gpu/drm/i915/intel_i2c.c:       if (!IS_PINEVIEW(dev_priv->dev))
drivers/gpu/drm/i915/intel_i2c.c:       if (!HAS_GMBUS_IRQ(dev_priv->dev))
drivers/gpu/drm/i915/intel_i2c.c:       if (!HAS_GMBUS_IRQ(dev_priv->dev))
drivers/gpu/drm/i915/intel_pm.c:        if (IS_GEN9(dev_priv->dev)) {
drivers/gpu/drm/i915/intel_pm.c:        if (IS_GEN9(dev_priv->dev))
drivers/gpu/drm/i915/intel_pm.c:        else if (IS_CHERRYVIEW(dev_priv->dev))
drivers/gpu/drm/i915/intel_pm.c:        else if (IS_VALLEYVIEW(dev_priv->dev))
drivers/gpu/drm/i915/intel_pm.c:        if (IS_GEN9(dev_priv->dev))
drivers/gpu/drm/i915/intel_pm.c:        else if (IS_CHERRYVIEW(dev_priv->dev))
drivers/gpu/drm/i915/intel_pm.c:        else if (IS_VALLEYVIEW(dev_priv->dev))
drivers/gpu/drm/i915/intel_psr.c:       if (HAS_DDI(dev_priv->dev)) {
drivers/gpu/drm/i915/intel_runtime_pm.c:        if (IS_HASWELL(dev_priv->dev)) {
drivers/gpu/drm/i915/intel_runtime_pm.c:        } else if (IS_BROADWELL(dev_priv->dev)) {
drivers/gpu/drm/i915/intel_runtime_pm.c:        } else if (IS_SKYLAKE(dev_priv->dev) || IS_KABYLAKE(dev_priv->dev)) {
drivers/gpu/drm/i915/intel_runtime_pm.c:        } else if (IS_BROXTON(dev_priv->dev)) {
drivers/gpu/drm/i915/intel_runtime_pm.c:        } else if (IS_CHERRYVIEW(dev_priv->dev)) {
drivers/gpu/drm/i915/intel_runtime_pm.c:        } else if (IS_VALLEYVIEW(dev_priv->dev)) {
drivers/gpu/drm/i915/intel_uncore.c:    if (IS_VALLEYVIEW(dev_priv->dev))
drivers/gpu/drm/i915/intel_uncore.c:    if (INTEL_INFO(dev_priv->dev)->gen <= 5)

are all good candidates for contraction.
-Chris
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 2d53b67..e99177a 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -2306,7 +2306,7 @@  void i915_check_and_clear_faults(struct drm_device *dev)
 
 static void i915_ggtt_flush(struct drm_i915_private *dev_priv)
 {
-	if (INTEL_INFO(dev_priv->dev)->gen < 6) {
+	if (INTEL_INFO(dev_priv)->gen < 6) {
 		intel_gtt_chipset_flush();
 	} else {
 		I915_WRITE(GFX_FLSH_CNTL_GEN6, GFX_FLSH_CNTL_EN);
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index a9c1813..6b1dae7 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -2828,7 +2828,7 @@  semaphore_wait_to_signaller_ring(struct intel_engine_cs *engine, u32 ipehr,
 	struct drm_i915_private *dev_priv = engine->dev->dev_private;
 	struct intel_engine_cs *signaller;
 
-	if (INTEL_INFO(dev_priv->dev)->gen >= 8) {
+	if (INTEL_INFO(dev_priv)->gen >= 8) {
 		for_each_engine(signaller, dev_priv) {
 			if (engine == signaller)
 				continue;
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index e6b5ee5..a2853b1 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -1196,7 +1196,7 @@  static void assert_fdi_tx_pll_enabled(struct drm_i915_private *dev_priv,
 	u32 val;
 
 	/* ILK FDI PLL is always enabled */
-	if (INTEL_INFO(dev_priv->dev)->gen == 5)
+	if (INTEL_INFO(dev_priv)->gen == 5)
 		return;
 
 	/* On Haswell, DDI ports are responsible for the FDI PLL setup */
diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
index ac1c545..8ecdbdc 100644
--- a/drivers/gpu/drm/i915/intel_uncore.c
+++ b/drivers/gpu/drm/i915/intel_uncore.c
@@ -1161,7 +1161,7 @@  static void intel_uncore_fw_domains_init(struct drm_device *dev)
 {
 	struct drm_i915_private *dev_priv = dev->dev_private;
 
-	if (INTEL_INFO(dev_priv->dev)->gen <= 5)
+	if (INTEL_INFO(dev_priv)->gen <= 5)
 		return;
 
 	if (IS_GEN9(dev)) {