| Message ID | 1459515767-29228-2-git-send-email-imre.deak@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
Imre Deak <imre.deak@intel.com> writes: > [ text/plain ] > DMC version 1.06 has a known bug, where the firmware polls forever for a port > PLL to lock, if the PLL was disabled when entering DC5. Version 1.07 fixes > this, so make that the minimum required version on BXT. > If this would be for already released hw, we would need to be more descriptive about the symptoms. Like 'it hangs the box'. Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com> > CC: Mika Kuoppala <mika.kuoppala@linux.intel.com> > Signed-off-by: Imre Deak <imre.deak@intel.com> > --- > drivers/gpu/drm/i915/intel_csr.c | 20 +++++++++++++++----- > 1 file changed, 15 insertions(+), 5 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_csr.c b/drivers/gpu/drm/i915/intel_csr.c > index 3f57cb9..d57b00e 100644 > --- a/drivers/gpu/drm/i915/intel_csr.c > +++ b/drivers/gpu/drm/i915/intel_csr.c > @@ -50,6 +50,7 @@ MODULE_FIRMWARE(I915_CSR_SKL); > MODULE_FIRMWARE(I915_CSR_BXT); > > #define SKL_CSR_VERSION_REQUIRED CSR_VERSION(1, 23) > +#define BXT_CSR_VERSION_REQUIRED CSR_VERSION(1, 7) > > #define CSR_MAX_FW_SIZE 0x2FFF > #define CSR_DEFAULT_FW_OFFSET 0xFFFFFFFF > @@ -281,6 +282,7 @@ static uint32_t *parse_csr_fw(struct drm_i915_private *dev_priv, > uint32_t dmc_offset = CSR_DEFAULT_FW_OFFSET, readcount = 0, nbytes; > uint32_t i; > uint32_t *dmc_payload; > + uint32_t required_min_version; > > if (!fw) > return NULL; > @@ -296,15 +298,23 @@ static uint32_t *parse_csr_fw(struct drm_i915_private *dev_priv, > > csr->version = css_header->version; > > - if ((IS_SKYLAKE(dev_priv) || IS_KABYLAKE(dev_priv)) && > - csr->version < SKL_CSR_VERSION_REQUIRED) { > - DRM_INFO("Refusing to load old Skylake DMC firmware v%u.%u," > + if (IS_SKYLAKE(dev_priv) || IS_KABYLAKE(dev_priv)) { > + required_min_version = SKL_CSR_VERSION_REQUIRED; > + } else if (IS_BROXTON(dev_priv)) { > + required_min_version = BXT_CSR_VERSION_REQUIRED; > + } else { > + MISSING_CASE(INTEL_REVID(dev_priv)); > + required_min_version = 0; > + } > + > + if (csr->version < required_min_version) { > + DRM_INFO("Refusing to load old DMC firmware v%u.%u," > " please upgrade to v%u.%u or later" > " [" FIRMWARE_URL "].\n", > CSR_VERSION_MAJOR(csr->version), > CSR_VERSION_MINOR(csr->version), > - CSR_VERSION_MAJOR(SKL_CSR_VERSION_REQUIRED), > - CSR_VERSION_MINOR(SKL_CSR_VERSION_REQUIRED)); > + CSR_VERSION_MAJOR(required_min_version), > + CSR_VERSION_MINOR(required_min_version)); > return NULL; > } > > -- > 2.5.0
diff --git a/drivers/gpu/drm/i915/intel_csr.c b/drivers/gpu/drm/i915/intel_csr.c index 3f57cb9..d57b00e 100644 --- a/drivers/gpu/drm/i915/intel_csr.c +++ b/drivers/gpu/drm/i915/intel_csr.c @@ -50,6 +50,7 @@ MODULE_FIRMWARE(I915_CSR_SKL); MODULE_FIRMWARE(I915_CSR_BXT); #define SKL_CSR_VERSION_REQUIRED CSR_VERSION(1, 23) +#define BXT_CSR_VERSION_REQUIRED CSR_VERSION(1, 7) #define CSR_MAX_FW_SIZE 0x2FFF #define CSR_DEFAULT_FW_OFFSET 0xFFFFFFFF @@ -281,6 +282,7 @@ static uint32_t *parse_csr_fw(struct drm_i915_private *dev_priv, uint32_t dmc_offset = CSR_DEFAULT_FW_OFFSET, readcount = 0, nbytes; uint32_t i; uint32_t *dmc_payload; + uint32_t required_min_version; if (!fw) return NULL; @@ -296,15 +298,23 @@ static uint32_t *parse_csr_fw(struct drm_i915_private *dev_priv, csr->version = css_header->version; - if ((IS_SKYLAKE(dev_priv) || IS_KABYLAKE(dev_priv)) && - csr->version < SKL_CSR_VERSION_REQUIRED) { - DRM_INFO("Refusing to load old Skylake DMC firmware v%u.%u," + if (IS_SKYLAKE(dev_priv) || IS_KABYLAKE(dev_priv)) { + required_min_version = SKL_CSR_VERSION_REQUIRED; + } else if (IS_BROXTON(dev_priv)) { + required_min_version = BXT_CSR_VERSION_REQUIRED; + } else { + MISSING_CASE(INTEL_REVID(dev_priv)); + required_min_version = 0; + } + + if (csr->version < required_min_version) { + DRM_INFO("Refusing to load old DMC firmware v%u.%u," " please upgrade to v%u.%u or later" " [" FIRMWARE_URL "].\n", CSR_VERSION_MAJOR(csr->version), CSR_VERSION_MINOR(csr->version), - CSR_VERSION_MAJOR(SKL_CSR_VERSION_REQUIRED), - CSR_VERSION_MINOR(SKL_CSR_VERSION_REQUIRED)); + CSR_VERSION_MAJOR(required_min_version), + CSR_VERSION_MINOR(required_min_version)); return NULL; }
DMC version 1.06 has a known bug, where the firmware polls forever for a port PLL to lock, if the PLL was disabled when entering DC5. Version 1.07 fixes this, so make that the minimum required version on BXT. CC: Mika Kuoppala <mika.kuoppala@linux.intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> --- drivers/gpu/drm/i915/intel_csr.c | 20 +++++++++++++++----- 1 file changed, 15 insertions(+), 5 deletions(-)