| Message ID | 1459557870-9763-1-git-send-email-dongwon.kim@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
Hi Dongwon,
[auto build test WARNING on drm-intel/for-linux-next]
[also build test WARNING on next-20160401]
[cannot apply to v4.6-rc1]
[if your patch is applied to the wrong git tree, please drop us a note to help improving the system]
url: https://github.com/0day-ci/linux/commits/Dongwon-Kim/drm-i915-Gen9-optional-IPC-enablement/20160402-084819
base: git://anongit.freedesktop.org/drm-intel for-linux-next
config: i386-randconfig-s1-201613 (attached as .config)
reproduce:
# save the attached .config to linux build tree
make ARCH=i386
All warnings (new ones prefixed by >>):
In file included from include/linux/module.h:18:0,
from include/drm/drm_vma_manager.h:29,
from include/drm/drmP.h:75,
from drivers/gpu/drm/i915/i915_drv.h:36,
from drivers/gpu/drm/i915/i915_params.c:26:
drivers/gpu/drm/i915/i915_params.c: In function '__check_enable_ipc':
include/linux/moduleparam.h:344:67: warning: return from incompatible pointer type [-Wincompatible-pointer-types]
static inline type __always_unused *__check_##name(void) { return(p); }
^
include/linux/moduleparam.h:364:34: note: in expansion of macro '__param_check'
#define param_check_int(name, p) __param_check(name, p, int)
^
include/linux/moduleparam.h:154:2: note: in expansion of macro 'param_check_int'
param_check_##type(name, &(value)); \
^
>> drivers/gpu/drm/i915/i915_params.c:215:1: note: in expansion of macro 'module_param_named_unsafe'
module_param_named_unsafe(enable_ipc, i915.enable_ipc, int, 0400);
^
vim +/module_param_named_unsafe +215 drivers/gpu/drm/i915/i915_params.c
199 "2=default swing(400mV))");
200
201 module_param_named_unsafe(enable_guc_submission, i915.enable_guc_submission, bool, 0400);
202 MODULE_PARM_DESC(enable_guc_submission, "Enable GuC submission (default:false)");
203
204 module_param_named(guc_log_level, i915.guc_log_level, int, 0400);
205 MODULE_PARM_DESC(guc_log_level,
206 "GuC firmware logging level (-1:disabled (default), 0-3:enabled)");
207
208 module_param_named_unsafe(enable_dp_mst, i915.enable_dp_mst, bool, 0600);
209 MODULE_PARM_DESC(enable_dp_mst,
210 "Enable multi-stream transport (MST) for new DisplayPort sinks. (default: true)");
211 module_param_named_unsafe(inject_load_failure, i915.inject_load_failure, uint, 0400);
212 MODULE_PARM_DESC(inject_load_failure,
213 "Force an error after a number of failure check points (0:disabled (default), N:force failure at the Nth failure check point)");
214
> 215 module_param_named_unsafe(enable_ipc, i915.enable_ipc, int, 0400);
216 MODULE_PARM_DESC(enable_ipc,
217 "Enable Isochronous Priority Control (1=enabled, 0=disabled [default]");
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
diff --git a/drivers/gpu/drm/i915/i915_params.c b/drivers/gpu/drm/i915/i915_params.c index 1779f02..611a83b 100644 --- a/drivers/gpu/drm/i915/i915_params.c +++ b/drivers/gpu/drm/i915/i915_params.c @@ -58,6 +58,7 @@ struct i915_params i915 __read_mostly = { .guc_log_level = -1, .enable_dp_mst = true, .inject_load_failure = 0, + .enable_ipc = 0, }; module_param_named(modeset, i915.modeset, int, 0400); @@ -210,3 +211,7 @@ MODULE_PARM_DESC(enable_dp_mst, module_param_named_unsafe(inject_load_failure, i915.inject_load_failure, uint, 0400); MODULE_PARM_DESC(inject_load_failure, "Force an error after a number of failure check points (0:disabled (default), N:force failure at the Nth failure check point)"); + +module_param_named_unsafe(enable_ipc, i915.enable_ipc, int, 0400); +MODULE_PARM_DESC(enable_ipc, + "Enable Isochronous Priority Control (1=enabled, 0=disabled [default]"); diff --git a/drivers/gpu/drm/i915/i915_params.h b/drivers/gpu/drm/i915/i915_params.h index 02bc278..3b3fa1b 100644 --- a/drivers/gpu/drm/i915/i915_params.h +++ b/drivers/gpu/drm/i915/i915_params.h @@ -61,6 +61,7 @@ struct i915_params { bool verbose_state_checks; bool nuclear_pageflip; bool enable_dp_mst; + bool enable_ipc; }; extern struct i915_params i915 __read_mostly; diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 12f5103..0b638c5 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -5995,6 +5995,7 @@ enum skl_disp_power_wells { #define DISP_FBC_WM_DIS (1<<15) #define DISP_ARB_CTL2 _MMIO(0x45004) #define DISP_DATA_PARTITION_5_6 (1<<6) +#define DISP_ENABLE_IPC (1<<3) #define DBUF_CTL _MMIO(0x45008) #define DBUF_POWER_REQUEST (1<<31) #define DBUF_POWER_STATE (1<<30) diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 9bc9c25..9c696c0 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -3682,6 +3682,11 @@ static void skl_update_wm(struct drm_crtc *crtc) skl_write_wm_values(dev_priv, results); skl_flush_wm_values(dev_priv, results); + /* optional IPC enablement */ + if (i915.enable_ipc) + I915_WRITE(DISP_ARB_CTL2, + I915_READ(DISP_ARB_CTL2) | DISP_ENABLE_IPC); + /* store the new configuration */ dev_priv->wm.skl_hw = *results; }
With IPC(Isochronous Priority Control) enabled, display sends requests based on the priority of each request. To enable it, a i915 param, i915.enable_ipc should be set to 1. Signed-off-by: Dongwon Kim <dongwon.kim@intel.com> --- drivers/gpu/drm/i915/i915_params.c | 5 +++++ drivers/gpu/drm/i915/i915_params.h | 1 + drivers/gpu/drm/i915/i915_reg.h | 1 + drivers/gpu/drm/i915/intel_pm.c | 5 +++++ 4 files changed, 12 insertions(+)