From patchwork Mon Apr 4 17:57:10 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Kim, Dongwon" X-Patchwork-Id: 8743501 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 08C9C9F39A for ; Mon, 4 Apr 2016 17:58:05 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 2A745201B4 for ; Mon, 4 Apr 2016 17:58:04 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 2AC3E2012B for ; Mon, 4 Apr 2016 17:58:03 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id BA8CF6E648; Mon, 4 Apr 2016 17:58:02 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTP id AB0856E648 for ; Mon, 4 Apr 2016 17:58:01 +0000 (UTC) Received: from orsmga002.jf.intel.com ([10.7.209.21]) by fmsmga101.fm.intel.com with ESMTP; 04 Apr 2016 10:57:31 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.24,441,1455004800"; d="scan'208";a="947809028" Received: from downor-z87x-ud5h.fm.intel.com ([10.1.122.8]) by orsmga002.jf.intel.com with ESMTP; 04 Apr 2016 10:57:31 -0700 From: Dongwon Kim To: intel-gfx@lists.freedesktop.org, imre.deak@intel.com, matthew.d.roper@intel.com Date: Mon, 4 Apr 2016 10:57:10 -0700 Message-Id: <1459792630-18260-1-git-send-email-dongwon.kim@intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1459557870-9763-1-git-send-email-dongwon.kim@intel.com> References: <1459557870-9763-1-git-send-email-dongwon.kim@intel.com> Cc: Dongwon Kim Subject: [Intel-gfx] [PATCH v2] drm/i915/Gen9+: optional IPC enablement X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-5.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP With IPC(Isochronous Priority Control) enabled, display sends requests based on the priority of each request. To enable it, a i915 param, i915.enable_ipc should be set to 1. v2: corrected matched type of enable_ipc in module_param_named_unsafe macro Signed-off-by: Dongwon Kim --- drivers/gpu/drm/i915/i915_params.c | 5 +++++ drivers/gpu/drm/i915/i915_params.h | 1 + drivers/gpu/drm/i915/i915_reg.h | 1 + drivers/gpu/drm/i915/intel_pm.c | 5 +++++ 4 files changed, 12 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_params.c b/drivers/gpu/drm/i915/i915_params.c index 1779f02..4d5ac80 100644 --- a/drivers/gpu/drm/i915/i915_params.c +++ b/drivers/gpu/drm/i915/i915_params.c @@ -58,6 +58,7 @@ struct i915_params i915 __read_mostly = { .guc_log_level = -1, .enable_dp_mst = true, .inject_load_failure = 0, + .enable_ipc = 0, }; module_param_named(modeset, i915.modeset, int, 0400); @@ -210,3 +211,7 @@ MODULE_PARM_DESC(enable_dp_mst, module_param_named_unsafe(inject_load_failure, i915.inject_load_failure, uint, 0400); MODULE_PARM_DESC(inject_load_failure, "Force an error after a number of failure check points (0:disabled (default), N:force failure at the Nth failure check point)"); + +module_param_named_unsafe(enable_ipc, i915.enable_ipc, bool, 0400); +MODULE_PARM_DESC(enable_ipc, + "Enable Isochronous Priority Control (1=enabled, 0=disabled [default]"); diff --git a/drivers/gpu/drm/i915/i915_params.h b/drivers/gpu/drm/i915/i915_params.h index 02bc278..3b3fa1b 100644 --- a/drivers/gpu/drm/i915/i915_params.h +++ b/drivers/gpu/drm/i915/i915_params.h @@ -61,6 +61,7 @@ struct i915_params { bool verbose_state_checks; bool nuclear_pageflip; bool enable_dp_mst; + bool enable_ipc; }; extern struct i915_params i915 __read_mostly; diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 12f5103..0b638c5 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -5995,6 +5995,7 @@ enum skl_disp_power_wells { #define DISP_FBC_WM_DIS (1<<15) #define DISP_ARB_CTL2 _MMIO(0x45004) #define DISP_DATA_PARTITION_5_6 (1<<6) +#define DISP_ENABLE_IPC (1<<3) #define DBUF_CTL _MMIO(0x45008) #define DBUF_POWER_REQUEST (1<<31) #define DBUF_POWER_STATE (1<<30) diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 9bc9c25..9c696c0 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -3682,6 +3682,11 @@ static void skl_update_wm(struct drm_crtc *crtc) skl_write_wm_values(dev_priv, results); skl_flush_wm_values(dev_priv, results); + /* optional IPC enablement */ + if (i915.enable_ipc) + I915_WRITE(DISP_ARB_CTL2, + I915_READ(DISP_ARB_CTL2) | DISP_ENABLE_IPC); + /* store the new configuration */ dev_priv->wm.skl_hw = *results; }