From patchwork Fri Apr 15 17:46:00 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chris Wilson X-Patchwork-Id: 8853901 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id B8F719F3A0 for ; Fri, 15 Apr 2016 17:46:20 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id C37C820218 for ; Fri, 15 Apr 2016 17:46:19 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id E860520204 for ; Fri, 15 Apr 2016 17:46:18 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 1E7326E23C; Fri, 15 Apr 2016 17:46:18 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-wm0-x242.google.com (mail-wm0-x242.google.com [IPv6:2a00:1450:400c:c09::242]) by gabe.freedesktop.org (Postfix) with ESMTPS id 865A06E23C for ; Fri, 15 Apr 2016 17:46:13 +0000 (UTC) Received: by mail-wm0-x242.google.com with SMTP id a140so8006422wma.2 for ; Fri, 15 Apr 2016 10:46:13 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=3BhxiFzeIBvFceLcf+C7pjFFg5cjZa6e9g4gLKv+jtk=; b=I5TnYLB3WiVy1HxUZ07evz6+wDzwRraRfyKw/1aPOHlWhUgn+VOu9OqDL/91nk1I8r StsKcnDND+Yv09HVwHPgW69eMNgqjgLk+xpJB0zFVZBoxKNAHbPdODMyzRs8OIeGnHvg hRf+E5FQTa4CvJeClcMK1eRQ5uD+ib4/+UNm1PKqf6/ROj+VLhyf/68VhI/9g7nxobTW 5P9hjYcbqWr8Ev18VVTDZPSwsfmuVnKqnc1Ds9tQVdn4tEDKdbhhcIroMfp/e9eTbpoI vbQFYbx+Mq8fQ1ja7k9NeLkZs2kxi1zRDO1gEonhxwzjd55qkGnoQqU0Ya9SUCZj8QCo 2Lng== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references; bh=3BhxiFzeIBvFceLcf+C7pjFFg5cjZa6e9g4gLKv+jtk=; b=VR9jrAs2bUqZpIdPF6aUbqkxtpvE9kTv2WkfWngRYjn1IxxIhg5sei643saoXvQKYw XOxlgPgB5ueJBAOa3DL12fNwBbTmMytc6xK/kgf3mINblFR50oC/fX+avxV914Mlpy0V dFtxtGfc7fdC8o580bWzJCQegCz5hWt8id0oC44Kc9BTB2sVAZ6Q8sEYpMoG+oDZ+cSf f3D+ojO5mg4C1VZ87aKEqRCeEWF1NdnP4GH5UvJr88rVrOEiLZsSntUWg9I9ytkSeHPO JWbQTgQuNpilYKMfRujsljXS2/RFrKpq7hfJGiz+vPFdOBHoWVvinFyvtf8oY0uKWZ9e 3lpQ== X-Gm-Message-State: AOPr4FU34Cv9Sh454aEh/fMhJtqn75LQ047WXtcwYi2NRqdsz2d7vSWpUGU8cdv0H1riMg== X-Received: by 10.194.189.38 with SMTP id gf6mr22564016wjc.72.1460742372153; Fri, 15 Apr 2016 10:46:12 -0700 (PDT) Received: from haswell.alporthouse.com ([78.156.65.138]) by smtp.gmail.com with ESMTPSA id q127sm12577034wmd.13.2016.04.15.10.46.10 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 15 Apr 2016 10:46:10 -0700 (PDT) From: Chris Wilson To: intel-gfx@lists.freedesktop.org Date: Fri, 15 Apr 2016 18:46:00 +0100 Message-Id: <1460742365-3646-2-git-send-email-chris@chris-wilson.co.uk> X-Mailer: git-send-email 2.8.0.rc3 In-Reply-To: <1460742365-3646-1-git-send-email-chris@chris-wilson.co.uk> References: <1460742365-3646-1-git-send-email-chris@chris-wilson.co.uk> Subject: [Intel-gfx] [PATCH 1/6] drm/i915: Rename the magic polymorphic macro __I915__ X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-5.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,RP_MATCHES_RCVD,T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP To open up the future of using a generic to_i915() convenience macro, rename the existing __I915__ superconvenience macro. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/i915_drv.h | 22 +++++++++++----------- 1 file changed, 11 insertions(+), 11 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 78231cc5f40b..6569ebfe8cf1 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -2004,14 +2004,14 @@ struct drm_i915_private { */ }; -static inline struct drm_i915_private *to_i915(const struct drm_device *dev) +static inline struct drm_i915_private *__to_i915(const struct drm_device *dev) { return dev->dev_private; } -static inline struct drm_i915_private *dev_to_i915(struct device *dev) +static inline struct drm_i915_private *dev_to_i915(const struct device *dev) { - return to_i915(dev_get_drvdata(dev)); + return __to_i915(dev_get_drvdata(dev)); } static inline struct drm_i915_private *guc_to_i915(struct intel_guc *guc) @@ -2492,20 +2492,20 @@ struct drm_i915_cmd_table { }; /* Note that the (struct drm_i915_private *) cast is just to shut up gcc. */ -#define __I915__(p) ({ \ +#define to_i915(p) ({ \ struct drm_i915_private *__p; \ if (__builtin_types_compatible_p(typeof(*p), struct drm_i915_private)) \ __p = (struct drm_i915_private *)p; \ else if (__builtin_types_compatible_p(typeof(*p), struct drm_device)) \ - __p = to_i915((struct drm_device *)p); \ + __p = __to_i915((struct drm_device *)p); \ else \ BUILD_BUG(); \ __p; \ }) -#define INTEL_INFO(p) (&__I915__(p)->info) +#define INTEL_INFO(p) (&to_i915(p)->info) #define INTEL_GEN(p) (INTEL_INFO(p)->gen) #define INTEL_DEVID(p) (INTEL_INFO(p)->device_id) -#define INTEL_REVID(p) (__I915__(p)->dev->pdev->revision) +#define INTEL_REVID(p) (to_i915(p)->dev->pdev->revision) #define REVID_FOREVER 0xff /* @@ -2630,7 +2630,7 @@ struct drm_i915_cmd_table { #define HAS_VEBOX(dev) (INTEL_INFO(dev)->ring_mask & VEBOX_RING) #define HAS_LLC(dev) (INTEL_INFO(dev)->has_llc) #define HAS_SNOOP(dev) (INTEL_INFO(dev)->has_snoop) -#define HAS_EDRAM(dev) (__I915__(dev)->edram_cap & EDRAM_ENABLED) +#define HAS_EDRAM(dev) (to_i915(dev)->edram_cap & EDRAM_ENABLED) #define HAS_WT(dev) ((IS_HASWELL(dev) || IS_BROADWELL(dev)) && \ HAS_EDRAM(dev)) #define I915_NEED_GFX_HWS(dev) (INTEL_INFO(dev)->need_gfx_hws) @@ -2714,11 +2714,11 @@ struct drm_i915_cmd_table { #define INTEL_PCH_P3X_DEVICE_ID_TYPE 0x7000 #define INTEL_PCH_QEMU_DEVICE_ID_TYPE 0x2900 /* qemu q35 has 2918 */ -#define INTEL_PCH_TYPE(dev) (__I915__(dev)->pch_type) +#define INTEL_PCH_TYPE(dev) (to_i915(dev)->pch_type) #define HAS_PCH_SPT(dev) (INTEL_PCH_TYPE(dev) == PCH_SPT) #define HAS_PCH_LPT(dev) (INTEL_PCH_TYPE(dev) == PCH_LPT) -#define HAS_PCH_LPT_LP(dev) (__I915__(dev)->pch_id == INTEL_PCH_LPT_LP_DEVICE_ID_TYPE) -#define HAS_PCH_LPT_H(dev) (__I915__(dev)->pch_id == INTEL_PCH_LPT_DEVICE_ID_TYPE) +#define HAS_PCH_LPT_LP(dev) (to_i915(dev)->pch_id == INTEL_PCH_LPT_LP_DEVICE_ID_TYPE) +#define HAS_PCH_LPT_H(dev) (to_i915(dev)->pch_id == INTEL_PCH_LPT_DEVICE_ID_TYPE) #define HAS_PCH_CPT(dev) (INTEL_PCH_TYPE(dev) == PCH_CPT) #define HAS_PCH_IBX(dev) (INTEL_PCH_TYPE(dev) == PCH_IBX) #define HAS_PCH_NOP(dev) (INTEL_PCH_TYPE(dev) == PCH_NOP)