From patchwork Tue Apr 19 10:07:35 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chris Wilson X-Patchwork-Id: 8878631 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id D7A989F1C1 for ; Tue, 19 Apr 2016 10:08:08 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 535022022A for ; Tue, 19 Apr 2016 10:08:03 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 7D5B120225 for ; Tue, 19 Apr 2016 10:08:02 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 6CB656E6F5; Tue, 19 Apr 2016 10:08:00 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-wm0-x242.google.com (mail-wm0-x242.google.com [IPv6:2a00:1450:400c:c09::242]) by gabe.freedesktop.org (Postfix) with ESMTPS id 878436E122 for ; Tue, 19 Apr 2016 10:07:50 +0000 (UTC) Received: by mail-wm0-x242.google.com with SMTP id n3so3683773wmn.1 for ; Tue, 19 Apr 2016 03:07:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=gPgoIPPfX8drVcBA07DFueQlH9SlBNXVtC8Qft1pykE=; b=rrjlij/sB8YQF5CH+R4dMgj7R32aA0gBmGgZMAGC3cOrQ2rQA+zq/9Q6m+duuPwppM Bnl2XdNwEpu5ndF43KaiNFRZJFLOT9Nf2Iks9Mm1vK/ZheEueB2Xg5oy1J0Zlqe++b88 ybgFYt7xtbf/c7eCTTu5c0TJuE1lbUYl/A+AL/ysVAB5nh3HqV1XJShcfnGBWGCIIF4v qLuGQQ02kd0+y+cUzfxYAL6rxB7RXQLYqQRJI6QwgTgD3yIz6i5p6ksf4OTK9UGLueIz fGHQwcIXYSs0x9uw6S4qb8ocIX7boERCfDi43wJ0KzXFyVQadX3hNSTXRafBoqguE34Z xLgw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references; bh=gPgoIPPfX8drVcBA07DFueQlH9SlBNXVtC8Qft1pykE=; b=HXUOw2AK29xkz7bzhbSz7wl1+CtmKzOxzNjn+F9oHFuSRRq/Pr6QNztVhZBUP9M/la k1vszpE0WcZz1OHfJYzRdXJ3Pr/CbaFs2Em15SKFKyp4WnrCFQxUaAh1eoCi/33H0vSX qAe4hgkjMzfGV3maDajqpCl2a6T2TJjjBB+Pzg7bbqvsvb4CrcQ8SeXr2BNU77MiVCRA X7FNb48HlNMn2EFIBTikGS0F/FEADyRwncydLVJFZyDWDcEuTfPPf95FbT9Vav1aZYUO V3XYF0gWL82uXOPXt0jaeFROUeHnRPYeGQ0Y8FlTUArYaz84iQ3sN4esbzehIM0bb6xU BTsw== X-Gm-Message-State: AOPr4FXnx5CdOkE9yxbqZltQzE2bKmCnlZzg2eu3j3SViHYmQ0QUeQC9KUOWjfj3yearCw== X-Received: by 10.194.83.42 with SMTP id n10mr2278167wjy.20.1461060468909; Tue, 19 Apr 2016 03:07:48 -0700 (PDT) Received: from haswell.alporthouse.com ([78.156.65.138]) by smtp.gmail.com with ESMTPSA id j10sm68806783wjb.46.2016.04.19.03.07.47 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 19 Apr 2016 03:07:47 -0700 (PDT) From: Chris Wilson To: intel-gfx@lists.freedesktop.org Date: Tue, 19 Apr 2016 11:07:35 +0100 Message-Id: <1461060455-14098-3-git-send-email-chris@chris-wilson.co.uk> X-Mailer: git-send-email 2.8.0.rc3 In-Reply-To: <1461060455-14098-1-git-send-email-chris@chris-wilson.co.uk> References: <5715FD43.9050506@linux.intel.com> <1461060455-14098-1-git-send-email-chris@chris-wilson.co.uk> Subject: [Intel-gfx] [PATCH 3/3] drm/i915: Remove early l3-remap X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-5.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,RP_MATCHES_RCVD,T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Since we do the l3-remap on context switch, we can remove the redundant early call to set the mapping prior to performing the first context switch. Signed-off-by: Chris Wilson Reviewed-by: Tvrtko Ursulin --- drivers/gpu/drm/i915/i915_drv.h | 1 - drivers/gpu/drm/i915/i915_gem.c | 10 +--------- drivers/gpu/drm/i915/i915_gem_context.c | 4 ++-- 3 files changed, 3 insertions(+), 12 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index bfcaf98f2ed7..5b2a9f1bcd96 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -3155,7 +3155,6 @@ bool i915_gem_clflush_object(struct drm_i915_gem_object *obj, bool force); int __must_check i915_gem_init(struct drm_device *dev); int i915_gem_init_engines(struct drm_device *dev); int __must_check i915_gem_init_hw(struct drm_device *dev); -int i915_gem_l3_remap(struct drm_i915_gem_request *req, int slice); void i915_gem_init_swizzling(struct drm_device *dev); void i915_gem_cleanup_engines(struct drm_device *dev); int __must_check i915_gpu_idle(struct drm_device *dev); diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index 59419f10e76a..a0f485a1576b 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c @@ -4833,7 +4833,7 @@ i915_gem_init_hw(struct drm_device *dev) { struct drm_i915_private *dev_priv = dev->dev_private; struct intel_engine_cs *engine; - int ret, j; + int ret; if (INTEL_INFO(dev)->gen < 6 && !intel_enable_gtt()) return -EIO; @@ -4915,14 +4915,6 @@ i915_gem_init_hw(struct drm_device *dev) break; } - if (engine->id == RCS) { - for (j = 0; j < NUM_L3_SLICES(dev); j++) { - ret = i915_gem_l3_remap(req, j); - if (ret) - goto err_request; - } - } - ret = i915_ppgtt_init_ring(req); if (ret) goto err_request; diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c index b47ed8b6f4be..e02a22d056cc 100644 --- a/drivers/gpu/drm/i915/i915_gem_context.c +++ b/drivers/gpu/drm/i915/i915_gem_context.c @@ -643,7 +643,7 @@ mi_set_context(struct drm_i915_gem_request *req, u32 hw_flags) return ret; } -int i915_gem_l3_remap(struct drm_i915_gem_request *req, int slice) +static int remap_l3(struct drm_i915_gem_request *req, int slice) { u32 *remap_info = req->i915->l3_parity.remap_info[slice]; struct intel_engine_cs *engine = req->engine; @@ -841,7 +841,7 @@ static int do_rcs_switch(struct drm_i915_gem_request *req) if (!(to->remap_slice & (1<