From patchwork Tue Apr 19 11:40:42 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chris Wilson X-Patchwork-Id: 8879001 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 070D39F1C1 for ; Tue, 19 Apr 2016 11:41:29 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 0382D20145 for ; Tue, 19 Apr 2016 11:41:28 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 044772012B for ; Tue, 19 Apr 2016 11:41:27 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 2E30588E37; Tue, 19 Apr 2016 11:41:26 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-wm0-x241.google.com (mail-wm0-x241.google.com [IPv6:2a00:1450:400c:c09::241]) by gabe.freedesktop.org (Postfix) with ESMTPS id 80AAE6E741 for ; Tue, 19 Apr 2016 11:41:02 +0000 (UTC) Received: by mail-wm0-x241.google.com with SMTP id y144so4364683wmd.0 for ; Tue, 19 Apr 2016 04:41:02 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=9nR1gEFyiELh4XqiFEaZIC3mYuYAV5OVFOPnYt+6Smo=; b=RzX+xBqAnzBQlFPpi1eEFll5CH3dSeAZi47IO9AsKom4rQSmFRfZG6Bj7Fdp7EDATY 0HHXQowbP7nY3R8/G016ZhWazWy/03rlz6vXg8wv4Zbda1RyjpvPHjcKtmPBAbGx1s8T JoBFiZsGtDJ19Z5aYKEWMPGHLHRpTebftntcz0SvrereoZMAikj4s87r77bfTmd1MDHq O5xgdH9dQ1bUSXwGZT9nCNHgxip4e1VawgiNHTskbzN7gTaHYC10A4VuEUA1xzZzKm0j bELAtXRLxmSyTrzwFz8pGz1AVM9CJIVtNZDsKjkT4k31My7C5qlYCJbLMJIvUUnnw15I TcPg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references; bh=9nR1gEFyiELh4XqiFEaZIC3mYuYAV5OVFOPnYt+6Smo=; b=j2gJYEbK9rclOKgn8BcsxcDZRS9ivtrWWlA9mUklt6Bc7iMPO69yBSCMQMrGLJPGcC rbLszI8KiVM2gCq7pMbnu/8HLQl/apBV31SIxL4Zgvhzs8cZahpNCpX++Fn/x4cIUGSz aUXubOwcuA/GXrX9iVndwvKSm1C5lpZiLfu/R8ax4UGTN9y6VDLu/fCD6lFZtcrsf5Ad hw1C28wwWVqCiP2dMjpWYe5QizVn6f3di0QPGVZKNzwe4SYuEPKh2JR/2I5erLCtraDK e4jVbMClmsLguBHeIBMN/4ZFfmRd7tvKC0EF3Nf2L3vDXhgwt/Jy3F5CXjHfLDPSDmId o4cQ== X-Gm-Message-State: AOPr4FXIHaiGJoSluc4TXxGLVWsgnhk48GUzjQDZb7L7kI/Z8Kj7EM01z4UMC74Ubj0GEw== X-Received: by 10.28.157.71 with SMTP id g68mr22813853wme.79.1461066060962; Tue, 19 Apr 2016 04:41:00 -0700 (PDT) Received: from haswell.alporthouse.com ([78.156.65.138]) by smtp.gmail.com with ESMTPSA id ys9sm68886569wjc.35.2016.04.19.04.40.59 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 19 Apr 2016 04:41:00 -0700 (PDT) From: Chris Wilson To: intel-gfx@lists.freedesktop.org Date: Tue, 19 Apr 2016 12:40:42 +0100 Message-Id: <1461066053-30072-2-git-send-email-chris@chris-wilson.co.uk> X-Mailer: git-send-email 2.8.0.rc3 In-Reply-To: <1461066053-30072-1-git-send-email-chris@chris-wilson.co.uk> References: <1461066053-30072-1-git-send-email-chris@chris-wilson.co.uk> Subject: [Intel-gfx] [PATCH v2 01/12] drm/i915: Mark the current context as lost on suspend X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-5.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,RP_MATCHES_RCVD,T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP In order to force a reload of the context image upon resume, we first need to mark its absence on suspend. Currently we are failing to restore the golden context state and any context w/a to the default context after resume. One oversight corrected, is that we had forgotten to reapply the L3 remapping when restoring the lost default context. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/i915_drv.h | 1 + drivers/gpu/drm/i915/i915_gem.c | 1 + drivers/gpu/drm/i915/i915_gem_context.c | 47 +++++++++++++++++---------------- 3 files changed, 26 insertions(+), 23 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 85102ad75962..595037bec2de 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -3299,6 +3299,7 @@ void i915_gem_object_save_bit_17_swizzle(struct drm_i915_gem_object *obj); /* i915_gem_context.c */ int __must_check i915_gem_context_init(struct drm_device *dev); +void i915_gem_context_lost(struct drm_i915_private *dev_priv); void i915_gem_context_fini(struct drm_device *dev); void i915_gem_context_reset(struct drm_device *dev); int i915_gem_context_open(struct drm_device *dev, struct drm_file *file); diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index 6ce2c31b9a81..e7fe29857e23 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c @@ -4711,6 +4711,7 @@ i915_gem_suspend(struct drm_device *dev) i915_gem_retire_requests(dev); i915_gem_stop_engines(dev); + i915_gem_context_lost(dev_priv); mutex_unlock(&dev->struct_mutex); cancel_delayed_work_sync(&dev_priv->gpu_error.hangcheck_work); diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c index e5acc3916f75..c306c0b8435c 100644 --- a/drivers/gpu/drm/i915/i915_gem_context.c +++ b/drivers/gpu/drm/i915/i915_gem_context.c @@ -90,6 +90,8 @@ #include "i915_drv.h" #include "i915_trace.h" +#define ALL_L3_SLICES(dev) (1 << NUM_L3_SLICES(dev)) - 1 + /* This is a HW constraint. The value below is the largest known requirement * I've seen in a spec to date, and that was a workaround for a non-shipping * part. It should be safe to decrease this, but it's more future proof as is. @@ -249,7 +251,7 @@ __create_hw_context(struct drm_device *dev, /* NB: Mark all slices as needing a remap so that when the context first * loads it will restore whatever remap state already exists. If there * is no remap info, it will be a NOP. */ - ctx->remap_slice = (1 << NUM_L3_SLICES(dev)) - 1; + ctx->remap_slice = ALL_L3_SLICES(dev_priv); ctx->hang_stats.ban_period_seconds = DRM_I915_CTX_BAN_PERIOD; @@ -336,7 +338,6 @@ static void i915_gem_context_unpin(struct intel_context *ctx, void i915_gem_context_reset(struct drm_device *dev) { struct drm_i915_private *dev_priv = dev->dev_private; - int i; if (i915.enable_execlists) { struct intel_context *ctx; @@ -345,17 +346,7 @@ void i915_gem_context_reset(struct drm_device *dev) intel_lr_context_reset(dev_priv, ctx); } - for (i = 0; i < I915_NUM_ENGINES; i++) { - struct intel_engine_cs *engine = &dev_priv->engine[i]; - - if (engine->last_context) { - i915_gem_context_unpin(engine->last_context, engine); - engine->last_context = NULL; - } - } - - /* Force the GPU state to be reinitialised on enabling */ - dev_priv->kernel_context->legacy_hw_ctx.initialized = false; + i915_gem_context_lost(dev_priv); } int i915_gem_context_init(struct drm_device *dev) @@ -403,11 +394,30 @@ int i915_gem_context_init(struct drm_device *dev) return 0; } +void i915_gem_context_lost(struct drm_i915_private *dev_priv) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(dev_priv->engine); i++) { + struct intel_engine_cs *engine = &dev_priv->engine[i]; + + if (engine->last_context) { + i915_gem_context_unpin(engine->last_context, engine); + engine->last_context = NULL; + } + } + + /* Force the GPU state to be reinitialised on enabling */ + dev_priv->kernel_context->legacy_hw_ctx.initialized = false; + dev_priv->kernel_context->remap_slice = ALL_L3_SLICES(dev_priv); +} + void i915_gem_context_fini(struct drm_device *dev) { struct drm_i915_private *dev_priv = dev->dev_private; struct intel_context *dctx = dev_priv->kernel_context; - int i; + + i915_gem_context_lost(dev_priv); if (dctx->legacy_hw_ctx.rcs_state) { /* The only known way to stop the gpu from accessing the hw context is @@ -426,15 +436,6 @@ void i915_gem_context_fini(struct drm_device *dev) i915_gem_object_ggtt_unpin(dctx->legacy_hw_ctx.rcs_state); } - for (i = I915_NUM_ENGINES; --i >= 0;) { - struct intel_engine_cs *engine = &dev_priv->engine[i]; - - if (engine->last_context) { - i915_gem_context_unpin(engine->last_context, engine); - engine->last_context = NULL; - } - } - i915_gem_context_unreference(dctx); dev_priv->kernel_context = NULL; }