From patchwork Tue Apr 19 12:59:08 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chris Wilson X-Patchwork-Id: 8879871 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 6C9CE9F39A for ; Tue, 19 Apr 2016 12:59:39 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 625242026C for ; Tue, 19 Apr 2016 12:59:38 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 812292015A for ; Tue, 19 Apr 2016 12:59:37 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 6021A6E774; Tue, 19 Apr 2016 12:59:36 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-wm0-x244.google.com (mail-wm0-x244.google.com [IPv6:2a00:1450:400c:c09::244]) by gabe.freedesktop.org (Postfix) with ESMTPS id 8A5876E771 for ; Tue, 19 Apr 2016 12:59:26 +0000 (UTC) Received: by mail-wm0-x244.google.com with SMTP id n3so4989209wmn.1 for ; Tue, 19 Apr 2016 05:59:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=cPjMfq0cG9tb1qZkB9NQVXqsw4CEI9Vh0oiGUM099gs=; b=IGVSezMpyHTOwLYK0X9g7iAFW2n1B/ddbatQ4J2Zqayoz5qY135fIA0zesSx3Y6wFc eioDY+qiFDCJhdDg+S5ik2GXf84k7wf/NmgW9EXSP4WB/9K0lpEHJ7FyyHYzpi/jJVvV UmbTVYMHxr6AuyX7h+UQehZ4PipNEF1FS4oVIx+s+AnwXYPpxrvsEBM7FJyPs2UK0jV0 o+njRYIFwgWVpYcF0jUd61QrSWl6Ka0gNVSbs63jOiyCmAcr2nsdVXJN2apTMSREqVnE yDrtz5zLQ0CcVJJ8ssOS5yTAhOmfWBCsvwTIrTP4ydvzle+cHDINjKupobqYZ/QgD4aC OBNg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references; bh=cPjMfq0cG9tb1qZkB9NQVXqsw4CEI9Vh0oiGUM099gs=; b=XuqxEpHH7PvEIHSf6HuEs0P/10o9CJw0/JG1bCztzumGrHGIRzrYegeb0mWRdNvWXe R/KCg94fIdMThn2enhhdlclMAuUsRrzkGYCZX+fAWTAobA4COtQsgQQec6mmuIQm8rvG KXprdxGbzvgPSuGL1DdXplWBt6KzAPqS2QNUepAggxCl7VSfeo/KNBptxrlzLBsxW2MN adfSpznd8zxbkkPtgXGTRTBCuEFHFnd4b10KaWI9WYunSV4o/YM+WbYpvb1hLk07nPqW 5GSRxF0F6ZUamJV8+dIWW6fD/8qrt7z0cNOldD0Sy2EjYeMPiooyYt4xhqr0uFYVxNNw itfA== X-Gm-Message-State: AOPr4FXyQesB2BkqrE/AoXjI7M3/nLbl9eVbnkkByOvJexa6XFjzj3a715ke5WYJ5c+MJA== X-Received: by 10.28.63.73 with SMTP id m70mr25505649wma.55.1461070765005; Tue, 19 Apr 2016 05:59:25 -0700 (PDT) Received: from haswell.alporthouse.com ([78.156.65.138]) by smtp.gmail.com with ESMTPSA id f186sm4191344wmf.24.2016.04.19.05.59.23 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 19 Apr 2016 05:59:24 -0700 (PDT) From: Chris Wilson To: intel-gfx@lists.freedesktop.org Date: Tue, 19 Apr 2016 13:59:08 +0100 Message-Id: <1461070748-767-3-git-send-email-chris@chris-wilson.co.uk> X-Mailer: git-send-email 2.8.0.rc3 In-Reply-To: <1461070748-767-1-git-send-email-chris@chris-wilson.co.uk> References: <1461066053-30072-1-git-send-email-chris@chris-wilson.co.uk> <1461070748-767-1-git-send-email-chris@chris-wilson.co.uk> Subject: [Intel-gfx] [PATCH 2/2] drm/i915: Track the previous pinned context inside the request X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-5.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,RP_MATCHES_RCVD,T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP As the contexts are accessed by the hardware until the switch is completed to a new context, the hardware may still be writing to the context object after the breadcrumb is visible. We must not unpin/unbind/prune that object whilst still active and so we keep the previous context pinned until the following request. If we move this tracking onto the request, we can simplify the code and treat execlists/GuC dispatch identically. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/i915_drv.h | 11 +++++++++++ drivers/gpu/drm/i915/i915_gem.c | 8 ++++---- drivers/gpu/drm/i915/intel_lrc.c | 17 ++++++++--------- 3 files changed, 23 insertions(+), 13 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index c59b2670cc36..be98e9643072 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -2302,6 +2302,17 @@ struct drm_i915_gem_request { struct intel_context *ctx; struct intel_ringbuffer *ringbuf; + /** + * Context related to the previous request. + * As the contexts are accessed by the hardware until the switch is + * completed to a new context, the hardware may still be writing + * to the context object after the breadcrumb is visible. We must + * not unpin/unbind/prune that object whilst still active and so + * we keep the previous context pinned until the following (this) + * request is retired. + */ + struct intel_context *previous_context; + /** Batch buffer related to this request if any (used for error state dump only) */ struct drm_i915_gem_object *batch_obj; diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index 9b4854a17264..537aacfda3eb 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c @@ -1413,13 +1413,13 @@ static void i915_gem_request_retire(struct drm_i915_gem_request *request) list_del_init(&request->list); i915_gem_request_remove_from_client(request); - if (request->ctx) { + if (request->previous_context) { if (i915.enable_execlists) - intel_lr_context_unpin(request->ctx, request->engine); - - i915_gem_context_unreference(request->ctx); + intel_lr_context_unpin(request->previous_context, + request->engine); } + i915_gem_context_unreference(request->ctx); i915_gem_request_unreference(request); } diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c index ee4e9bb80042..06e013293ec6 100644 --- a/drivers/gpu/drm/i915/intel_lrc.c +++ b/drivers/gpu/drm/i915/intel_lrc.c @@ -590,7 +590,6 @@ static void execlists_context_queue(struct drm_i915_gem_request *request) struct drm_i915_gem_request *cursor; int num_elements = 0; - intel_lr_context_pin(request->ctx, request->engine); i915_gem_request_reference(request); spin_lock_bh(&engine->execlist_lock); @@ -788,12 +787,14 @@ intel_logical_ring_advance_and_submit(struct drm_i915_gem_request *request) if (intel_engine_stopped(engine)) return 0; - if (engine->last_context != request->ctx) { - if (engine->last_context) - intel_lr_context_unpin(engine->last_context, engine); - intel_lr_context_pin(request->ctx, engine); - engine->last_context = request->ctx; - } + /* We keep the previous context alive until we retire the following + * request. This ensures that any the context object is still pinned + * for any residual writes the HW makes into it on the context switch + * into the next object following the breadcrumb. Otherwise, we may + * retire the context too early. + */ + request->previous_context = engine->last_context; + engine->last_context = request->ctx; if (dev_priv->guc.execbuf_client) i915_guc_submit(dev_priv->guc.execbuf_client, request); @@ -1015,8 +1016,6 @@ void intel_execlists_retire_requests(struct intel_engine_cs *engine) spin_unlock_bh(&engine->execlist_lock); list_for_each_entry_safe(req, tmp, &retired_list, execlist_link) { - intel_lr_context_unpin(req->ctx, engine); - list_del(&req->execlist_link); i915_gem_request_unreference(req); }