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[resend-for-CI,1/3] drm/i915/gen8+: Do not enable DPF interrupt since the handler does not exist

Message ID 1461080770-14693-1-git-send-email-tvrtko.ursulin@linux.intel.com (mailing list archive)
State New, archived
Headers show

Commit Message

Tvrtko Ursulin April 19, 2016, 3:46 p.m. UTC 
From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>

Looks like DPF was not implemented for gen8+ but the IER and IMR
are still enabled on initialization.

Since there is no code to handle this interrupt, gate the irq
enablement behind HAS_L3_DPF in case the feature gets enabled
in the future.

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/i915_irq.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

Comments

Tvrtko Ursulin April 20, 2016, 9:04 a.m. UTC | #1 
On 19/04/16 18:24, Patchwork wrote:
> == Series Details ==
>
> Series: series starting with [resend-for-CI,1/3] drm/i915/gen8+: Do not enable DPF interrupt since the handler does not exist
> URL   : https://patchwork.freedesktop.org/series/5944/
> State : failure
>
> == Summary ==
>
> Series 5944v1 Series without cover letter
> http://patchwork.freedesktop.org/api/1.0/series/5944/revisions/1/mbox/
>
> Test kms_flip:
>          Subgroup basic-flip-vs-wf_vblank:
>                  fail       -> PASS       (byt-nuc)
> Test kms_force_connector_basic:
>          Subgroup prune-stale-modes:
>                  skip       -> PASS       (ilk-hp8440p)
>
> bdw-nuci7        total:192  pass:180  dwarn:0   dfail:0   fail:0   skip:12
> bdw-ultra        total:192  pass:169  dwarn:0   dfail:0   fail:0   skip:23
> bsw-nuc-2        total:191  pass:151  dwarn:0   dfail:0   fail:0   skip:40
> byt-nuc          total:191  pass:153  dwarn:0   dfail:0   fail:0   skip:38
> hsw-brixbox      total:192  pass:168  dwarn:0   dfail:0   fail:0   skip:24
> hsw-gt2          total:192  pass:173  dwarn:0   dfail:0   fail:0   skip:19
> ilk-hp8440p      total:192  pass:135  dwarn:0   dfail:0   fail:0   skip:57
> ivb-t430s        total:192  pass:164  dwarn:0   dfail:0   fail:0   skip:28
> skl-i7k-2        total:192  pass:167  dwarn:0   dfail:0   fail:0   skip:25
> skl-nuci5        total:192  pass:181  dwarn:0   dfail:0   fail:0   skip:11
> snb-x220t        total:192  pass:154  dwarn:0   dfail:0   fail:1   skip:37
> BOOT FAILED for snb-dellxps
>
> Results at /archive/results/CI_IGT_test/Patchwork_1947/
>
> 30468e0d25064b544b8da9d14fd7727fdd650064 drm-intel-nightly: 2016y-04m-19d-16h-24m-23s UTC integration manifest
> 8f2ce93 drm/i915: Remove a couple pointless WARN_ONs
> a5e26d7 drm/i915/gen8+: Do not enable DPF interrupt since the handler does not exist

Merged, thanks for the review.

Regards,

Tvrtko
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 93da4feb3048..2f6fd33c07ba 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -3796,7 +3796,6 @@  static void gen8_gt_irq_postinstall(struct drm_i915_private *dev_priv)
 	uint32_t gt_interrupts[] = {
 		GT_RENDER_USER_INTERRUPT << GEN8_RCS_IRQ_SHIFT |
 			GT_CONTEXT_SWITCH_INTERRUPT << GEN8_RCS_IRQ_SHIFT |
-			GT_RENDER_L3_PARITY_ERROR_INTERRUPT |
 			GT_RENDER_USER_INTERRUPT << GEN8_BCS_IRQ_SHIFT |
 			GT_CONTEXT_SWITCH_INTERRUPT << GEN8_BCS_IRQ_SHIFT,
 		GT_RENDER_USER_INTERRUPT << GEN8_VCS1_IRQ_SHIFT |
@@ -3808,6 +3807,9 @@  static void gen8_gt_irq_postinstall(struct drm_i915_private *dev_priv)
 			GT_CONTEXT_SWITCH_INTERRUPT << GEN8_VECS_IRQ_SHIFT
 		};
 
+	if (HAS_L3_DPF(dev_priv))
+		gt_interrupts[0] |= GT_RENDER_L3_PARITY_ERROR_INTERRUPT;
+
 	dev_priv->pm_irq_mask = 0xffffffff;
 	GEN8_IRQ_INIT_NDX(GT, 0, ~gt_interrupts[0], gt_interrupts[0]);
 	GEN8_IRQ_INIT_NDX(GT, 1, ~gt_interrupts[1], gt_interrupts[1]);