From patchwork Wed Apr 20 17:13:29 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Harrison X-Patchwork-Id: 8893331 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 3CB37BF29F for ; Wed, 20 Apr 2016 17:14:20 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 36383201C0 for ; Wed, 20 Apr 2016 17:14:19 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 34A3320254 for ; Wed, 20 Apr 2016 17:14:18 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 4844A6EA8F; Wed, 20 Apr 2016 17:14:13 +0000 (UTC) X-Original-To: Intel-GFX@lists.freedesktop.org Delivered-To: Intel-GFX@lists.freedesktop.org Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by gabe.freedesktop.org (Postfix) with ESMTP id 759BD6EA8C for ; Wed, 20 Apr 2016 17:14:10 +0000 (UTC) Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by fmsmga102.fm.intel.com with ESMTP; 20 Apr 2016 10:14:10 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.24,510,1455004800"; d="scan'208";a="689424367" Received: from johnharr-linux.isw.intel.com ([10.102.226.93]) by FMSMGA003.fm.intel.com with ESMTP; 20 Apr 2016 10:14:09 -0700 From: John.C.Harrison@Intel.com To: Intel-GFX@Lists.FreeDesktop.Org Date: Wed, 20 Apr 2016 18:13:29 +0100 Message-Id: <1461172435-4256-12-git-send-email-John.C.Harrison@Intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1461172435-4256-1-git-send-email-John.C.Harrison@Intel.com> References: <1461172435-4256-1-git-send-email-John.C.Harrison@Intel.com> Organization: Intel Corporation (UK) Ltd. - Co. Reg. #1134945 - Pipers Way, Swindon SN3 1RJ Subject: [Intel-gfx] [PATCH v6 11/34] drm/i915: Added deferred work handler for scheduler X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-5.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: John Harrison The scheduler needs to do interrupt triggered work that is too complex to do in the interrupt handler. Thus it requires a deferred work handler to process such tasks asynchronously. v2: Updated to reduce mutex lock usage. The lock is now only held for the minimum time within the remove function rather than for the whole of the worker thread's operation. v5: Removed objectionable white space and added some documentation. [Joonas Lahtinen] v6: Updated to newer nightly (lots of ring -> engine renaming). Added an i915_scheduler_destroy() function instead of doing explicit clean up of scheduler internals from i915_driver_unload(). [review feedback from Joonas Lahtinen] For: VIZ-1587 Signed-off-by: John Harrison Cc: Joonas Lahtinen Reviewed-by: Joonas Lahtinen --- drivers/gpu/drm/i915/i915_drv.h | 10 ++++++++++ drivers/gpu/drm/i915/i915_gem.c | 2 ++ drivers/gpu/drm/i915/i915_scheduler.c | 28 ++++++++++++++++++++++++++-- drivers/gpu/drm/i915/i915_scheduler.h | 1 + 4 files changed, 39 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 7b62e2c..ed9d829 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -1296,6 +1296,16 @@ struct i915_gem_mm { struct delayed_work retire_work; /** + * New scheme is to get an interrupt after every work packet + * in order to allow the low latency scheduling of pending + * packets. The idea behind adding new packets to a pending + * queue rather than directly into the hardware ring buffer + * is to allow high priority packets to over take low priority + * ones. + */ + struct work_struct scheduler_work; + + /** * When we detect an idle GPU, we want to turn on * powersaving features. So once we see that there * are no more requests outstanding and no more diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index 14dc641..50c45f3 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c @@ -5546,6 +5546,8 @@ i915_gem_load_init(struct drm_device *dev) i915_gem_retire_work_handler); INIT_DELAYED_WORK(&dev_priv->mm.idle_work, i915_gem_idle_work_handler); + INIT_WORK(&dev_priv->mm.scheduler_work, + i915_scheduler_work_handler); init_waitqueue_head(&dev_priv->gpu_error.reset_queue); dev_priv->relative_constants_mode = I915_EXEC_CONSTANTS_REL_GENERAL; diff --git a/drivers/gpu/drm/i915/i915_scheduler.c b/drivers/gpu/drm/i915/i915_scheduler.c index 6dd9838..2dc5597 100644 --- a/drivers/gpu/drm/i915/i915_scheduler.c +++ b/drivers/gpu/drm/i915/i915_scheduler.c @@ -95,6 +95,8 @@ void i915_scheduler_destroy(struct drm_i915_private *dev_priv) if (!scheduler) return; + cancel_work_sync(&dev_priv->mm.scheduler_work); + for (e = 0; e < I915_NUM_ENGINES; e++) WARN(!list_empty(&scheduler->node_queue[e]), "Destroying with list entries on engine %d!", e); @@ -738,7 +740,9 @@ static int i915_scheduler_remove_dependent(struct i915_scheduler *scheduler, */ void i915_scheduler_wakeup(struct drm_device *dev) { - /* XXX: Need to call i915_scheduler_remove() via work handler. */ + struct drm_i915_private *dev_priv = to_i915(dev); + + queue_work(dev_priv->wq, &dev_priv->mm.scheduler_work); } /** @@ -820,7 +824,7 @@ static bool i915_scheduler_remove(struct i915_scheduler *scheduler, return do_submit; } -void i915_scheduler_process_work(struct intel_engine_cs *engine) +static void i915_scheduler_process_work(struct intel_engine_cs *engine) { struct drm_i915_private *dev_priv = to_i915(engine->dev); struct i915_scheduler *scheduler = dev_priv->scheduler; @@ -867,6 +871,26 @@ void i915_scheduler_process_work(struct intel_engine_cs *engine) } /** + * i915_scheduler_work_handler - scheduler's work handler callback. + * @work: Work structure + * A lot of the scheduler's work must be done asynchronously in response to + * an interrupt or other event. However, that work cannot be done at + * interrupt time or in the context of the event signaller (which might in + * fact be an interrupt). Thus a worker thread is required. This function + * will cause the thread to wake up and do its processing. + */ +void i915_scheduler_work_handler(struct work_struct *work) +{ + struct intel_engine_cs *engine; + struct drm_i915_private *dev_priv; + + dev_priv = container_of(work, struct drm_i915_private, mm.scheduler_work); + + for_each_engine(engine, dev_priv) + i915_scheduler_process_work(engine); +} + +/** * i915_scheduler_closefile - notify the scheduler that a DRM file handle * has been closed. * @dev: DRM device diff --git a/drivers/gpu/drm/i915/i915_scheduler.h b/drivers/gpu/drm/i915/i915_scheduler.h index 40398bb..b8d4a343 100644 --- a/drivers/gpu/drm/i915/i915_scheduler.h +++ b/drivers/gpu/drm/i915/i915_scheduler.h @@ -110,5 +110,6 @@ void i915_scheduler_clean_node(struct i915_scheduler_queue_entry *node); int i915_scheduler_queue_execbuffer(struct i915_scheduler_queue_entry *qe); bool i915_scheduler_notify_request(struct drm_i915_gem_request *req); void i915_scheduler_wakeup(struct drm_device *dev); +void i915_scheduler_work_handler(struct work_struct *work); #endif /* _I915_SCHEDULER_H_ */