From patchwork Wed Apr 20 17:13:31 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Harrison X-Patchwork-Id: 8893361 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id AB202BF29F for ; Wed, 20 Apr 2016 17:14:21 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 9C15B20254 for ; Wed, 20 Apr 2016 17:14:20 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 6290520211 for ; Wed, 20 Apr 2016 17:14:19 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 24AC46EA92; Wed, 20 Apr 2016 17:14:15 +0000 (UTC) X-Original-To: Intel-GFX@lists.freedesktop.org Delivered-To: Intel-GFX@lists.freedesktop.org Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by gabe.freedesktop.org (Postfix) with ESMTP id D08BE6EA8D for ; Wed, 20 Apr 2016 17:14:12 +0000 (UTC) Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by fmsmga102.fm.intel.com with ESMTP; 20 Apr 2016 10:14:12 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.24,510,1455004800"; d="scan'208";a="689424384" Received: from johnharr-linux.isw.intel.com ([10.102.226.93]) by FMSMGA003.fm.intel.com with ESMTP; 20 Apr 2016 10:14:11 -0700 From: John.C.Harrison@Intel.com To: Intel-GFX@Lists.FreeDesktop.Org Date: Wed, 20 Apr 2016 18:13:31 +0100 Message-Id: <1461172435-4256-14-git-send-email-John.C.Harrison@Intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1461172435-4256-1-git-send-email-John.C.Harrison@Intel.com> References: <1461172435-4256-1-git-send-email-John.C.Harrison@Intel.com> Organization: Intel Corporation (UK) Ltd. - Co. Reg. #1134945 - Pipers Way, Swindon SN3 1RJ Subject: [Intel-gfx] [PATCH v6 13/34] drm/i915: Keep the reserved space mechanism happy X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-5.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: John Harrison Ring space is reserved when constructing a request to ensure that the subsequent 'add_request()' call cannot fail due to waiting for space on a busy or broken GPU. However, the scheduler jumps in to the middle of the execbuffer process between request creation and request submission. Thus it needs to cancel the reserved space when the request is simply added to the scheduler's queue and not yet submitted. Similarly, it needs to re-reserve the space when it finally does want to send the batch buffer to the hardware. v3: Updated to use locally cached request pointer. v5: Updated due to changes to earlier patches in series - for runtime PM calls and splitting bypass mode into a separate function. For: VIZ-1587 Signed-off-by: John Harrison Reviewed-by: Jesse Barnes --- drivers/gpu/drm/i915/i915_gem_execbuffer.c | 20 ++++++++++++++------ drivers/gpu/drm/i915/i915_scheduler.c | 4 ++++ drivers/gpu/drm/i915/intel_lrc.c | 13 +++++++++++-- 3 files changed, 29 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c index f7f3eb0..5df7ae2 100644 --- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c +++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c @@ -1296,18 +1296,22 @@ int i915_gem_ringbuffer_submission_final(struct i915_execbuffer_params *params) /* The mutex must be acquired before calling this function */ WARN_ON(!mutex_is_locked(¶ms->dev->struct_mutex)); + ret = intel_ring_reserve_space(req); + if (ret) + goto error; + /* * Unconditionally invalidate gpu caches and ensure that we do flush * any residual writes from the previous batch. */ ret = intel_ring_invalidate_all_caches(req); if (ret) - return ret; + goto error; /* Switch to the correct context for the batch */ ret = i915_switch_context(req); if (ret) - return ret; + goto error; WARN(params->ctx->ppgtt && params->ctx->ppgtt->pd_dirty_rings & (1<id), "%s didn't clear reload\n", engine->name); @@ -1316,7 +1320,7 @@ int i915_gem_ringbuffer_submission_final(struct i915_execbuffer_params *params) params->instp_mode != dev_priv->relative_constants_mode) { ret = intel_ring_begin(req, 4); if (ret) - return ret; + goto error; intel_ring_emit(engine, MI_NOOP); intel_ring_emit(engine, MI_LOAD_REGISTER_IMM(1)); @@ -1330,7 +1334,7 @@ int i915_gem_ringbuffer_submission_final(struct i915_execbuffer_params *params) if (params->args_flags & I915_EXEC_GEN7_SOL_RESET) { ret = i915_reset_gen7_sol_offsets(params->dev, req); if (ret) - return ret; + goto error; } exec_len = params->args_batch_len; @@ -1344,13 +1348,17 @@ int i915_gem_ringbuffer_submission_final(struct i915_execbuffer_params *params) exec_start, exec_len, params->dispatch_flags); if (ret) - return ret; + goto error; trace_i915_gem_ring_dispatch(req, params->dispatch_flags); i915_gem_execbuffer_retire_commands(params); - return 0; +error: + if (ret) + intel_ring_reserved_space_cancel(req->ringbuf); + + return ret; } /** diff --git a/drivers/gpu/drm/i915/i915_scheduler.c b/drivers/gpu/drm/i915/i915_scheduler.c index 2dc5597..2fb3f52 100644 --- a/drivers/gpu/drm/i915/i915_scheduler.c +++ b/drivers/gpu/drm/i915/i915_scheduler.c @@ -519,6 +519,8 @@ static int i915_scheduler_queue_execbuffer_bypass(struct i915_scheduler_queue_en struct i915_scheduler *scheduler = dev_priv->scheduler; int ret; + intel_ring_reserved_space_cancel(qe->params.request->ringbuf); + scheduler->flags[qe->params.engine->id] |= I915_SF_SUBMITTING; ret = dev_priv->gt.execbuf_final(&qe->params); scheduler->flags[qe->params.engine->id] &= ~I915_SF_SUBMITTING; @@ -584,6 +586,8 @@ int i915_scheduler_queue_execbuffer(struct i915_scheduler_queue_entry *qe) node->stamp = jiffies; i915_gem_request_reference(node->params.request); + intel_ring_reserved_space_cancel(node->params.request->ringbuf); + WARN_ON(node->params.request->scheduler_qe); node->params.request->scheduler_qe = node; diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c index 6bf0e3f..0a4ef61 100644 --- a/drivers/gpu/drm/i915/intel_lrc.c +++ b/drivers/gpu/drm/i915/intel_lrc.c @@ -1010,13 +1010,17 @@ int intel_execlists_submission_final(struct i915_execbuffer_params *params) /* The mutex must be acquired before calling this function */ WARN_ON(!mutex_is_locked(¶ms->dev->struct_mutex)); + ret = intel_logical_ring_reserve_space(req); + if (ret) + goto err; + /* * Unconditionally invalidate gpu caches and ensure that we do flush * any residual writes from the previous batch. */ ret = logical_ring_invalidate_all_caches(req); if (ret) - return ret; + goto err; if (engine == &dev_priv->engine[RCS] && params->instp_mode != dev_priv->relative_constants_mode) { @@ -1038,13 +1042,18 @@ int intel_execlists_submission_final(struct i915_execbuffer_params *params) ret = engine->emit_bb_start(req, exec_start, params->dispatch_flags); if (ret) - return ret; + goto err; trace_i915_gem_ring_dispatch(req, params->dispatch_flags); i915_gem_execbuffer_retire_commands(params); return 0; + +err: + intel_ring_reserved_space_cancel(params->request->ringbuf); + + return ret; } void intel_execlists_retire_requests(struct intel_engine_cs *engine)