From patchwork Wed Apr 20 17:13:43 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Harrison X-Patchwork-Id: 8893491 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 572319FB96 for ; Wed, 20 Apr 2016 17:14:32 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 49901201C0 for ; Wed, 20 Apr 2016 17:14:31 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 251112020F for ; Wed, 20 Apr 2016 17:14:30 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 055976EA99; Wed, 20 Apr 2016 17:14:29 +0000 (UTC) X-Original-To: Intel-GFX@lists.freedesktop.org Delivered-To: Intel-GFX@lists.freedesktop.org Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by gabe.freedesktop.org (Postfix) with ESMTP id 85A936EA9D for ; Wed, 20 Apr 2016 17:14:26 +0000 (UTC) Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by fmsmga102.fm.intel.com with ESMTP; 20 Apr 2016 10:14:26 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.24,510,1455004800"; d="scan'208";a="689424527" Received: from johnharr-linux.isw.intel.com ([10.102.226.93]) by FMSMGA003.fm.intel.com with ESMTP; 20 Apr 2016 10:14:25 -0700 From: John.C.Harrison@Intel.com To: Intel-GFX@Lists.FreeDesktop.Org Date: Wed, 20 Apr 2016 18:13:43 +0100 Message-Id: <1461172435-4256-26-git-send-email-John.C.Harrison@Intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1461172435-4256-1-git-send-email-John.C.Harrison@Intel.com> References: <1461172435-4256-1-git-send-email-John.C.Harrison@Intel.com> Organization: Intel Corporation (UK) Ltd. - Co. Reg. #1134945 - Pipers Way, Swindon SN3 1RJ Subject: [Intel-gfx] [PATCH v6 25/34] drm/i915: Added debugfs interface to scheduler tuning parameters X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-5.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: John Harrison There are various parameters within the scheduler which can be tuned to improve performance, reduce memory footprint, etc. This change adds support for altering these via debugfs. v2: Updated for priorities now being signed values. v5: Squashed priority bumping entries into this patch rather than a separate patch all of their own. v6: Updated to newer nightly (lots of ring -> engine renaming). Updated to use 'to_i915()' instead of dev_private. [review feedback from Joonas Lahtinen] Added an admin only check when setting the parameters to prevent rogue user code trying to break the system with strange settings. [review feedback from Jesse Barnes] For: VIZ-1587 Signed-off-by: John Harrison Reviewed-by: Jesse Barnes --- drivers/gpu/drm/i915/i915_debugfs.c | 187 ++++++++++++++++++++++++++++++++++++ 1 file changed, 187 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c index e89781a..980bb20 100644 --- a/drivers/gpu/drm/i915/i915_debugfs.c +++ b/drivers/gpu/drm/i915/i915_debugfs.c @@ -39,6 +39,7 @@ #include "intel_ringbuffer.h" #include #include "i915_drv.h" +#include "i915_scheduler.h" enum { ACTIVE_LIST, @@ -1125,6 +1126,186 @@ DEFINE_SIMPLE_ATTRIBUTE(i915_next_seqno_fops, i915_next_seqno_get, i915_next_seqno_set, "0x%llx\n"); +static int +i915_scheduler_priority_min_get(void *data, u64 *val) +{ + struct drm_device *dev = data; + struct drm_i915_private *dev_priv = to_i915(dev); + struct i915_scheduler *scheduler = dev_priv->scheduler; + + *val = (u64) scheduler->priority_level_min; + return 0; +} + +static int +i915_scheduler_priority_min_set(void *data, u64 val) +{ + struct drm_device *dev = data; + struct drm_i915_private *dev_priv = to_i915(dev); + struct i915_scheduler *scheduler = dev_priv->scheduler; + + if (!capable(CAP_SYS_ADMIN)) + return -EPERM; + + scheduler->priority_level_min = (int32_t) val; + return 0; +} + +DEFINE_SIMPLE_ATTRIBUTE(i915_scheduler_priority_min_fops, + i915_scheduler_priority_min_get, + i915_scheduler_priority_min_set, + "%lld\n"); + +static int +i915_scheduler_priority_max_get(void *data, u64 *val) +{ + struct drm_device *dev = data; + struct drm_i915_private *dev_priv = to_i915(dev); + struct i915_scheduler *scheduler = dev_priv->scheduler; + + *val = (u64) scheduler->priority_level_max; + return 0; +} + +static int +i915_scheduler_priority_max_set(void *data, u64 val) +{ + struct drm_device *dev = data; + struct drm_i915_private *dev_priv = to_i915(dev); + struct i915_scheduler *scheduler = dev_priv->scheduler; + + if (!capable(CAP_SYS_ADMIN)) + return -EPERM; + + scheduler->priority_level_max = (int32_t) val; + return 0; +} + +DEFINE_SIMPLE_ATTRIBUTE(i915_scheduler_priority_max_fops, + i915_scheduler_priority_max_get, + i915_scheduler_priority_max_set, + "%lld\n"); + +static int +i915_scheduler_priority_bump_get(void *data, u64 *val) +{ + struct drm_device *dev = data; + struct drm_i915_private *dev_priv = to_i915(dev); + struct i915_scheduler *scheduler = dev_priv->scheduler; + + *val = (u64) scheduler->priority_level_bump; + return 0; +} + +static int +i915_scheduler_priority_bump_set(void *data, u64 val) +{ + struct drm_device *dev = data; + struct drm_i915_private *dev_priv = to_i915(dev); + struct i915_scheduler *scheduler = dev_priv->scheduler; + + if (!capable(CAP_SYS_ADMIN)) + return -EPERM; + + scheduler->priority_level_bump = (u32) val; + return 0; +} + +DEFINE_SIMPLE_ATTRIBUTE(i915_scheduler_priority_bump_fops, + i915_scheduler_priority_bump_get, + i915_scheduler_priority_bump_set, + "%lld\n"); + +static int +i915_scheduler_priority_preempt_get(void *data, u64 *val) +{ + struct drm_device *dev = data; + struct drm_i915_private *dev_priv = to_i915(dev); + struct i915_scheduler *scheduler = dev_priv->scheduler; + + *val = (u64) scheduler->priority_level_preempt; + return 0; +} + +static int +i915_scheduler_priority_preempt_set(void *data, u64 val) +{ + struct drm_device *dev = data; + struct drm_i915_private *dev_priv = to_i915(dev); + struct i915_scheduler *scheduler = dev_priv->scheduler; + + if (!capable(CAP_SYS_ADMIN)) + return -EPERM; + + scheduler->priority_level_preempt = (u32) val; + return 0; +} + +DEFINE_SIMPLE_ATTRIBUTE(i915_scheduler_priority_preempt_fops, + i915_scheduler_priority_preempt_get, + i915_scheduler_priority_preempt_set, + "%lld\n"); + +static int +i915_scheduler_min_flying_get(void *data, u64 *val) +{ + struct drm_device *dev = data; + struct drm_i915_private *dev_priv = to_i915(dev); + struct i915_scheduler *scheduler = dev_priv->scheduler; + + *val = (u64) scheduler->min_flying; + return 0; +} + +static int +i915_scheduler_min_flying_set(void *data, u64 val) +{ + struct drm_device *dev = data; + struct drm_i915_private *dev_priv = to_i915(dev); + struct i915_scheduler *scheduler = dev_priv->scheduler; + + if (!capable(CAP_SYS_ADMIN)) + return -EPERM; + + scheduler->min_flying = (u32) val; + return 0; +} + +DEFINE_SIMPLE_ATTRIBUTE(i915_scheduler_min_flying_fops, + i915_scheduler_min_flying_get, + i915_scheduler_min_flying_set, + "%llu\n"); + +static int +i915_scheduler_file_queue_max_get(void *data, u64 *val) +{ + struct drm_device *dev = data; + struct drm_i915_private *dev_priv = to_i915(dev); + struct i915_scheduler *scheduler = dev_priv->scheduler; + + *val = (u64) scheduler->file_queue_max; + return 0; +} + +static int +i915_scheduler_file_queue_max_set(void *data, u64 val) +{ + struct drm_device *dev = data; + struct drm_i915_private *dev_priv = to_i915(dev); + struct i915_scheduler *scheduler = dev_priv->scheduler; + + if (!capable(CAP_SYS_ADMIN)) + return -EPERM; + + scheduler->file_queue_max = (u32) val; + return 0; +} + +DEFINE_SIMPLE_ATTRIBUTE(i915_scheduler_file_queue_max_fops, + i915_scheduler_file_queue_max_get, + i915_scheduler_file_queue_max_set, + "%llu\n"); + static int i915_frequency_info(struct seq_file *m, void *unused) { struct drm_info_node *node = m->private; @@ -5426,6 +5607,12 @@ static const struct i915_debugfs_files { {"i915_gem_drop_caches", &i915_drop_caches_fops}, {"i915_error_state", &i915_error_state_fops}, {"i915_next_seqno", &i915_next_seqno_fops}, + {"i915_scheduler_priority_min", &i915_scheduler_priority_min_fops}, + {"i915_scheduler_priority_max", &i915_scheduler_priority_max_fops}, + {"i915_scheduler_priority_bump", &i915_scheduler_priority_bump_fops}, + {"i915_scheduler_priority_preempt", &i915_scheduler_priority_preempt_fops}, + {"i915_scheduler_min_flying", &i915_scheduler_min_flying_fops}, + {"i915_scheduler_file_queue_max", &i915_scheduler_file_queue_max_fops}, {"i915_display_crc_ctl", &i915_display_crc_ctl_fops}, {"i915_pri_wm_latency", &i915_pri_wm_latency_fops}, {"i915_spr_wm_latency", &i915_spr_wm_latency_fops},