From patchwork Wed Apr 20 17:13:22 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Harrison X-Patchwork-Id: 8893291 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 30BBCBF440 for ; Wed, 20 Apr 2016 17:14:14 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 3FC2620149 for ; Wed, 20 Apr 2016 17:14:13 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 32BE3201C0 for ; Wed, 20 Apr 2016 17:14:12 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id AA1876EA89; Wed, 20 Apr 2016 17:14:05 +0000 (UTC) X-Original-To: Intel-GFX@lists.freedesktop.org Delivered-To: Intel-GFX@lists.freedesktop.org Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by gabe.freedesktop.org (Postfix) with ESMTP id EA2CC6EA85 for ; Wed, 20 Apr 2016 17:14:01 +0000 (UTC) Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by fmsmga102.fm.intel.com with ESMTP; 20 Apr 2016 10:14:01 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.24,510,1455004800"; d="scan'208";a="689424244" Received: from johnharr-linux.isw.intel.com ([10.102.226.93]) by FMSMGA003.fm.intel.com with ESMTP; 20 Apr 2016 10:14:00 -0700 From: John.C.Harrison@Intel.com To: Intel-GFX@Lists.FreeDesktop.Org Date: Wed, 20 Apr 2016 18:13:22 +0100 Message-Id: <1461172435-4256-5-git-send-email-John.C.Harrison@Intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1461172435-4256-1-git-send-email-John.C.Harrison@Intel.com> References: <1461172435-4256-1-git-send-email-John.C.Harrison@Intel.com> Organization: Intel Corporation (UK) Ltd. - Co. Reg. #1134945 - Pipers Way, Swindon SN3 1RJ Subject: [Intel-gfx] [PATCH v6 04/34] drm/i915: Cache request pointer in *_submission_final() X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-5.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Dave Gordon Keep a local copy of the request pointer in the _final() functions rather than dereferencing the params block repeatedly. v3: New patch in series. v6: Updated to newer nightly (lots of ring -> engine renaming). For: VIZ-1587 Signed-off-by: Dave Gordon Signed-off-by: John Harrison Reviewed-by: Jesse Barnes --- drivers/gpu/drm/i915/i915_gem_execbuffer.c | 17 +++++++++-------- drivers/gpu/drm/i915/intel_lrc.c | 11 ++++++----- 2 files changed, 15 insertions(+), 13 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c index 6e500bf..2b902e3 100644 --- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c +++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c @@ -1292,6 +1292,7 @@ i915_gem_ringbuffer_submission(struct i915_execbuffer_params *params, int i915_gem_ringbuffer_submission_final(struct i915_execbuffer_params *params) { struct drm_i915_private *dev_priv = to_i915(params->dev); + struct drm_i915_gem_request *req = params->request; struct intel_engine_cs *engine = params->engine; u64 exec_start, exec_len; int ret; @@ -1303,12 +1304,12 @@ int i915_gem_ringbuffer_submission_final(struct i915_execbuffer_params *params) * Unconditionally invalidate gpu caches and ensure that we do flush * any residual writes from the previous batch. */ - ret = intel_ring_invalidate_all_caches(params->request); + ret = intel_ring_invalidate_all_caches(req); if (ret) return ret; /* Switch to the correct context for the batch */ - ret = i915_switch_context(params->request); + ret = i915_switch_context(req); if (ret) return ret; @@ -1317,7 +1318,7 @@ int i915_gem_ringbuffer_submission_final(struct i915_execbuffer_params *params) if (engine == &dev_priv->engine[RCS] && params->instp_mode != dev_priv->relative_constants_mode) { - ret = intel_ring_begin(params->request, 4); + ret = intel_ring_begin(req, 4); if (ret) return ret; @@ -1331,7 +1332,7 @@ int i915_gem_ringbuffer_submission_final(struct i915_execbuffer_params *params) } if (params->args_flags & I915_EXEC_GEN7_SOL_RESET) { - ret = i915_reset_gen7_sol_offsets(params->dev, params->request); + ret = i915_reset_gen7_sol_offsets(params->dev, req); if (ret) return ret; } @@ -1343,13 +1344,13 @@ int i915_gem_ringbuffer_submission_final(struct i915_execbuffer_params *params) if (exec_len == 0) exec_len = params->batch_obj->base.size; - ret = engine->dispatch_execbuffer(params->request, - exec_start, exec_len, - params->dispatch_flags); + ret = engine->dispatch_execbuffer(req, + exec_start, exec_len, + params->dispatch_flags); if (ret) return ret; - trace_i915_gem_ring_dispatch(params->request, params->dispatch_flags); + trace_i915_gem_ring_dispatch(req, params->dispatch_flags); i915_gem_execbuffer_retire_commands(params); diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c index 6ac063d..69df948 100644 --- a/drivers/gpu/drm/i915/intel_lrc.c +++ b/drivers/gpu/drm/i915/intel_lrc.c @@ -1005,7 +1005,8 @@ int intel_execlists_submission(struct i915_execbuffer_params *params, int intel_execlists_submission_final(struct i915_execbuffer_params *params) { struct drm_i915_private *dev_priv = to_i915(params->dev); - struct intel_ringbuffer *ringbuf = params->request->ringbuf; + struct drm_i915_gem_request *req = params->request; + struct intel_ringbuffer *ringbuf = req->ringbuf; struct intel_engine_cs *engine = params->engine; u64 exec_start; int ret; @@ -1017,13 +1018,13 @@ int intel_execlists_submission_final(struct i915_execbuffer_params *params) * Unconditionally invalidate gpu caches and ensure that we do flush * any residual writes from the previous batch. */ - ret = logical_ring_invalidate_all_caches(params->request); + ret = logical_ring_invalidate_all_caches(req); if (ret) return ret; if (engine == &dev_priv->engine[RCS] && params->instp_mode != dev_priv->relative_constants_mode) { - ret = intel_logical_ring_begin(params->request, 4); + ret = intel_logical_ring_begin(req, 4); if (ret) return ret; @@ -1039,11 +1040,11 @@ int intel_execlists_submission_final(struct i915_execbuffer_params *params) exec_start = params->batch_obj_vm_offset + params->args_batch_start_offset; - ret = engine->emit_bb_start(params->request, exec_start, params->dispatch_flags); + ret = engine->emit_bb_start(req, exec_start, params->dispatch_flags); if (ret) return ret; - trace_i915_gem_ring_dispatch(params->request, params->dispatch_flags); + trace_i915_gem_ring_dispatch(req, params->dispatch_flags); i915_gem_execbuffer_retire_commands(params);